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A Full Duplex MAC Protocol of Asymmetric Traffic Environment (비대칭 트래픽 환경에서의 전이중 MAC 프로토콜)

  • Ahn, Hyeongtae;Kim, Cheeha
    • KIISE Transactions on Computing Practices
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    • v.22 no.8
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    • pp.381-386
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    • 2016
  • Recently full-duplex communication in wireless networks is enabled by the advancement of self-interference cancellation technology. Full-duplex radio is a promising technology for next-generation wireless local area networks (WLAN) because it can simultaneously transmit and receive signals within the same frequency band. Since legacy medium access control (MAC) protocols are designed based on half-duplex communication, they are not suitable for full-duplex communication. In this paper, we discuss considerations of full-duplex communication and propose a novel full-duplex MAC protocol. We conducted a simulation to measure the throughput of our MAC protocol. Through the simulation results, we can verify that significant throughput gains of the proposed full-duplex MAC protocol, thus comparing the basic full-duplex MAC protocol.

Construction the Full-Text Database and Development a Integrated Management System of Research Output at a Research Library (전문도서관의 연구산출물 원문데이터베이스 구축 및 통합관리시스템 구현)

  • Yoo, An-Na;Oh, Jeong-Hoon
    • Journal of Information Management
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    • v.34 no.1
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    • pp.59-75
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    • 2003
  • This study described about development the integrated management system for research reports and construction full text database of KAERI reports. This system enables centralization of various information related to reports by connecting with management information system. The advantages of this study are consistency of database between digital library and MIS, reduction of budget and manpower and increase of research productivity.

The Impedance Analysis of Multiple TSV-to-TSV (다중(multiple) TSV-to-TSV의 임피던스 해석)

  • Lee, Sihyun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.131-137
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    • 2016
  • In this paper, we analyze the impedance analysis of vertical interconnection through-silicon vias (TSV) that is being studied for the purpose of improving the degree of integration and an electric feature in 3D IC. Also, it is to improve the performance and the degree of integration of the three-dimensional integrated circuit system which can exceed the limits of conventional two-dimensional a IC. In the future, TSV technology in full-chip 3-dimensional integrated circuit system design is very important, and a study on the electrical characteristics of the TSV for high-density and high-bandwidth system design is very important. Therefore, we study analyze the impedance influence of the TSV in accordance with the distance and frequency in a multiple TSV-to-TSV for the purpose of designing a full-chip three-dimensional IC. The results of this study also are applicable to semiconductor process tools and designed for the manufacture of a full-chip 3D IC.

DIMENSIONS OF THE SUBSETS IN THE SPECTRAL CLASSES OF A SELF-SIMILAR CANTOR SET

  • Baek, In-Soo
    • Journal of applied mathematics & informatics
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    • v.26 no.3_4
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    • pp.733-738
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    • 2008
  • Using an information of dimensions of divergence points, we give full information of dimensions of the completely decomposed class of the lower(upper) distribution sets of a self-similar Cantor set. Further using a relationship between the distribution sets and the subsets generated by the lower(upper) local dimensions of a self-similar measure, we give full information of dimensions of the subsets by the local dimensions.

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CMOS Transmission Gate Circuits Dissipating Leakage Power Only (누설전력소비만을 갖는 CMOS 전달게이트 회로)

  • Park, Dae-Jin;Chung, Kang-Min
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.467-468
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    • 2008
  • In this paper, a logic family, the transmission gate CMOS(TG CMOS) is proposed, which combines the transmission gate and pass transistor resulting in a different configuration from traditional full CMOS. In the simulation, basic cells comprising this logic are designed and their dynamic responses are analyzed. The simulation shows their performance is exceeding that of conventional full CMOS.

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Adaptive Matching Scan Algorithm Based on Gradient Magnitude and Sub-blocks in Fast Motion Estimation of Full Search (전영역 탐색의 고속 움직임 예측에서 기울기 크기와 부 블록을 이용한 적응 매칭 스캔 알고리즘)

  • 김종남;최태선
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.1097-1100
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    • 1999
  • Due to the significant computation of full search in motion estimation, extensive research in fast motion estimation algorithms has been carried out. However, most of the algorithms have the degradation in predicted images compared with the full search algorithm. To reduce an amount of significant computation while keeping the same prediction quality of the full search, we propose a fast block-matching algorithm based on gradient magnitude of reference block without any degradation of predicted image. By using Taylor series expansion, we show that the block matching errors between reference block and candidate block are proportional to the gradient magnitude of matching block. With the derived result, we propose fast full search algorithm with adaptively determined scan direction in the block matching. Experimentally, our proposed algorithm is very efficient in terms of computational speedup and has the smallest computation among all the conventional full search algorithms. Therefore, our algorithm is useful in VLSI implementation of video encoder requiring real-time application.

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Design of High Performance Full-Swing BiCMOS Logic Circuit (고성능 풀 스윙 BiCMOS 논리회로의 설계)

  • Park, Jong-Ryul;Han, Seok-Bung
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.11
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    • pp.1-10
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    • 1993
  • This paper proposes a High Performance Full-Swing BiCMOS (HiF-BiCMOS) circuit which improves on the conventional BiCMOS circuit. The HiF-BiCMOS circuit has all the merits of the conventional BiCMOS circuit and can realize full-swing logic operation. Especially, the speed of full-swing logic operation is much faster than that of conventional full-swing BiCMOS circuit. And the number of transistors added in the HiF-BiCMOS for full-swing logic operation is constant regardless of the number of logic gate inputs. The HiF-BiCMOS circui has high stability to variation of environment factors such as temperature. Also, it has a preamorphized Si layer was changed into the perfect crystal Si after the RTA. Remarkable scalability for power supply voltage according to the development of VLSI technology. The power dissipation of HiF-BiCMOS is very small and hardly increases about a large fanout. Though the Spice simulation, the validity of the proposed circuit design is proved.

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Feasibility of Interference Alignment for Full-Duplex MIMO Cellular Networks (전 이중 다중 안테나 셀룰라 네트워크의 간섭 정렬 타당성)

  • Kim, Kiyeon;Yang, Janghoon;Jeon, Sang-Woon;Kim, Dong Ku
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2389-2391
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    • 2015
  • The feasibility condition of interference alignment (IA) for full-duplex (FD) multiple-input multipleoutput (MIMO) cellular networks is considered. The necessary and sufficient condition on the IA feasibility is established, characterizing the achievable sum degrees of freedom (DoF). The results demonstrate that FD operation with appropriate IA is able to improve the sum DoF on the conventional half-duplex operation.

On Jacket Matrices Based on Weighted Hadamard Matrices

  • Lee Moon-Ho;Pokhrel Subash Shree;Choe Chang-Hui;Kim Chang-Joo
    • Journal of electromagnetic engineering and science
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    • v.7 no.1
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    • pp.17-27
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    • 2007
  • Jacket matrices which are defined to be $n{\times}n$ matrices $A=(a_{jk})$ over a field F with the property $AA^+=nI_n$ where $A^+$ is the transpose matrix of elements inverse of A,i.e., $A^+=(a_{kj}^-)$, was introduced by Lee in 1984 and are used for signal processing and coding theory, which generalized the Hadamard matrices and Center Weighted Hadamard matrices. In this paper, some properties and constructions of Jacket matrices are extensively investigated and small orders of Jacket matrices are characterized, also present the full rate and the 1/2 code rate complex orthogonal space time code with full diversity.

Design of Dual-channel Interleaved Phase-shift Full-bridge Converter

  • Che, Yanbo;Wang, Dianmeng;Liu, Xiaokun
    • Journal of Electrical Engineering and Technology
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    • v.12 no.4
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    • pp.1529-1536
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    • 2017
  • A digital dual-channel interleaved phase-shift full-bridge converter is investigated in this paper, and its topology and principle are analyzed. To realize current sharing and stabilize the output voltage, a controller with current sharing loop and closed voltage loop is employed. In addition, current sharing will increase the output current fluctuation and a new digital interleaved driving technology is proposed to reduce the output current ripple. To verify the analysis, simulation and experiments are carried out, which shows the effectiveness of the proposed control strategies.