• 제목/요약/키워드: ferroelectric memory

검색결과 241건 처리시간 0.023초

3D NAND Flash Memory에서 Tapering된 O/N/O 및 O/N/F 구조의 Threshold Voltage 변화 분석 (The Analysis of Threshold Voltage Shift for Tapered O/N/O and O/N/F Structures in 3D NAND Flash Memory)

  • 이지환;이재우;강명곤
    • 전기전자학회논문지
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    • 제28권1호
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    • pp.110-115
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    • 2024
  • 본 논문은 3D NAND Flash memory에서 tapering된 O/N/O(Oxide/Nitride/Oxide) 구조와 blocking oxide를 ferroelectric material로 대체한 O/N/F(Oxide/Nitride/Ferroelectric) 구조의 Vth(Threshold Voltage) 변화량을 분석했다. Tapering 각도가 0°일 때 O/N/F 구조는 O/N/O 구조보다 저항이 작고 WL(Word-Line) 상부와 WL 하부의 Vth 변화량이 감소한다. Tapering된 3D NAND Flash memory는 WL 상부에서 WL 하부로 내려갈수록 channel 면적이 감소하며 channel 저항이 증가한다. 따라서 tapering 각도가 증가할수록 WL 상부의 Vth가 감소하고 WL 하부의 Vth는 증가한다. Tapering된 O/N/F 구조는 channel 반지름 길이와 비례하는 Vfe로 인해 WL 상부의 Vth는 O/N/O 구조보다 더 감소한다. 또한 O/N/F 구조의 WL 하부는 O/N/O 구조보다 Vth가 증가하기 때문에 tapering 각도에 따른 Vth 변화량이 O/N/O 구조보다 더 증가한다.

Current Status and Prospects of FET-type Ferroelectric Memories

  • Ishiwara, Hiroshi
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권1호
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    • pp.1-14
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    • 2001
  • Current status and prospects of FET-type FeRAMs (ferroelectric random access memories) are reviewed. First, it is described that the most important issue for realizing FET-type FeRAMs is to improve the data retention characteristics of ferroelectric-gate FETs. Then, necessary conditions to prolong the retention time are discussed from viewpoints of materials, device structure, and circuit configuration. Finally, recent experimental results related to the FET-type memories are introduced, which include optimization of a buffer layer that is inserted between the ferroelectric film and a Si substrate, development of a new ferroelectric film with a small remnant polarization value, proposal and fabrication of a 1T2C-type memory cell with good retention characteristics, and so on.

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CeO2Buffer Layer를 이용한 Pt/BLT/CeO2/Si 구조의 특성 (Characterization of Pt/BLT/CeO2/Si Structures using CeO2 Buffer Layer)

  • 이정미;김경태;김창일
    • 한국전기전자재료학회논문지
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    • 제16권10호
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    • pp.865-870
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    • 2003
  • The MFIS (Metal-Ferroelectric-Insulator-Semiconductor) capacitors were fabricated using a metalorganic decomposition method. Thin layers of CeO$_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the CeO$_2$ layer. The morphology of films and the interface structures of the BLT and the CeO$_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 2.82 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

A Single Transistor Type Ferroelectric Field-Effect-Transistor Cell Scheme

  • Yang, Yil-Suk;You, In-Kyu;Lee, Wong-Jae;Yu, Byoung-Gon;Cho, Kyong-Ik
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -1
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    • pp.403-405
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    • 2000
  • This paper describes a single transistor type ferroelectric field effect transistor (1Tr FeFET) memory cell scheme, which select one unit memory cell and program/read it. The well voltage can be controlled by isolating the common row well lines. Through applying bias voltage to Gate and Well, respectively, we implement If FeFET memory cell scheme in which interference problem is not generated and the selection of each memory cell is possible. The results of HSPICE simulations showed the successful operations of the proposed cell scheme.

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누설전류를 고려한 Quasi-MFISFET 소자의 특성 (Characteristics of Quasi-MFISFET Device Considering Leakage Current)

  • 정윤근;정양희;강성준
    • 한국정보통신학회논문지
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    • 제11권9호
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    • pp.1717-1723
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    • 2007
  • 본 연구에서는 PLZT(10/30/70), PLT(10), PZT(30/70) 강유전체 박막을 이용한 quasi-MFISFET (Metal-Ferroelectric-Insulator-Semiconductor FET) 소자를 제작하여 드레인 전류 특성을 조사하였다. 이로부터, quasi-MHSFET 소자의 드레인 전류 크기가 강유전체 박막의 분극 크기에 따라 직접적인 영향을 받으며 결정된다는 사실을 알 수 있었다. 또, ${\pm}5V$${\pm}10V$의 게이트 전압변화를 주었을 때 메모리 윈도우는 각각 0.5V 와 1.3V 이었고, 강유전체 박막에 인가되는 전압에 의해 만들어지는 항전압의 변동에 따라 메모리 윈도우가 변화된다는 사실을 확인할 수 있었다. MFISFET 소자의 retention 특성을 알아보기 위 해 PLZT(10/30/70) 박막의 전기장과 시간지연에 따른 누설전류 특성을 측정하여 전류밀도 상수 $J_{ETO}$, 전기장 의존 요소 K, 시간 의존 요소 m을 구하고, 이들 파라미터를 이용하여 시간에 따른 전하밀도의 변화를 정량적으로 분석하였다.

(Bi,La)$Ti_3O_12/$ 강유전체 물질을 갖는 전계효과형 트랜지스터의 제작과 특성연구 (Preparation and Properties of Field Effect Transistor with (Bi,La)$Ti_3O_12/$ Ferroelectric Materials)

  • 서강모;조중연;장호정
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.180-180
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    • 2003
  • FRAM (Ferroelectric Random Access Memory)은 DRAM(Dynamic Random Access Memory)in 커패시터 재료을 상유전체 물질에서 강유전체 물질로 대체하여 전원 공급이 차단되어도 정보를 기억할 수 있고, 데이터의 고속처리가 가능하고 저소비전력과 집적화가 뛰어난 차세대 메모리 소자이다. 본 연구에서는 n-Well/P-Si(100) 기판위에 $Y_2$O$_3$ 박막을 중간층 (buffer layer)으로 사용하여 (Bi,La) Ti$_3$O$_{12}$ (BLT) 강유전체 박막을 졸-겔 방법으로 형성하여 MFM(I)S(Metal Ferroelectric Metal (Insulation) Silicon) 구조의 커패시터 및 전계효과형 트랜지스터(Field Effect Transistor) 소자를 제작하였다. 제작된 소자에 대해 형상학적, 전기적 특성을 조사, 분석하였다.

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Ferroelectric P(VDF/TrFE) Copolymers in Low-Cost Non-Volatile Data Storage Applications

  • Prabu A. Anand;Lee, Jong-Soon;Chang You-Min;Kim, Kap-Jin
    • 한국고분자학회:학술대회논문집
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    • 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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    • pp.237-237
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    • 2006
  • P(VDF/TrFE(72/28) ultrathin films were used in the fabrication of Metal-Ferroelectric polymer-Metal (MFM) single bit device with special emphasis on uniform film surface, faster dipole switching time under applied external field and longer memory retention time. AFM and FTIR-GIRAS were complementary in analyzing surface crystalline morphology and the resultant change in chain orientation with varying thermal history. DC-EFM technique was used to 'write-read-erase' the data on the memory bit in a much faster time than P-E studies. The results obtained from this study will enable us to have a good understanding of the ferroelectric and piezoelectric behavior of P(VDF/TrFE)(72/28) thin films suitable for high density data storage applications.

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메로리 소자 응용을 위한 펄스 레이저 증착법으로 제작된 PLT박막의 열처리 효과 (Annealing Effect of Pb(La, Ti)$O_3$Thin Films Grown by Pulsed Laser Deposition for Memory Device Application)

  • 허창회;심경석;이상렬
    • 한국전기전자재료학회논문지
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    • 제13권9호
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    • pp.725-728
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    • 2000
  • Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, We have systematically investigated the variation of grain sizes depending on the process condition of two-step process. Both in-situ annealing and ex-annealing have been compared depending on the annealing time. C-V measurement, ferroelectric properties, leakage current, XRD and SEM were performed to investigate the electircal properties and microstructural properties of Pb(La, Ti)O$_3$ films.

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강유전체 PZT박막을 이용한 MFMIS소자의 모델링 및 특성에 관한 시뮬레이션 연구 (Computer Modeling and characteristics of MFMIS devices Using Ferroelectric PZT Thin Film)

  • 국상호;박지온;문병무
    • 한국전기전자재료학회논문지
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    • 제13권3호
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    • pp.200-205
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    • 2000
  • This paper describes the structure modeling and operation characteristics of MFMIS(metal-ferroelectric-metal-insulator-semiconductor) device using the Tsuprem4 which is a semiconductor device tool by Avanti. MFMIS device is being studied for nonvolatile memory application at various semiconductor laboratory but it is difficult to fabricate and analyze MFMIS devices using the semiconductor simulation tool: Tsuprem4, medici and etc. So the new library and new materials parameters for adjusting ferroelectric material and platinum electrodes in the tools are studied. In this paper structural model and operation characteristics of MFMIS devices are measured, which can be easily adopted to analysis of MFMIS device for nonvolatile memory device application.

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메모리 소자 응용을 위한 펄스 레이저 증착법으로 제작된 PLT박막의 열처리 효과 연구 (Effect of grain size of Pb(La,Ti)O$_3$thin films grown by pulsed laser deposition for memory device application)

  • 허창회;심경석;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.861-864
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    • 2000
  • Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, thin films of PLT(28)(Pb$\sub$0.72/La$\sub$0.28/Ti$\sub$0.93/O$_3$) were fabricated on Pt/Ti/SiO$_2$/Si substrates in-situ annealing and ex-situ annealing have been compared depending on the annealing time. We have systematically investigated the variation of grain sizes depending on the condition of post-annealing and the variation of deposition rate. C-V measurement, ferroelectric properties, leakage current and SEM were performed to investigate the electrical properties and the microstructural properties of Pb(La,Ti)O$_3$.

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