• Journal of the Korean Ceramic Society
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• v.42 no.2 s.273
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• pp.104-109
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• 2005

To study the role of PbO as the buffer layer, Pt/PZT/PbO/Si with the MFIS structure was deposited on the p-type (100) Si substrate by the r.f. magnetron sputtering with $Pb_{1.1}Zr_{0.53}Ti_{0.47}O_3$ and PbO targets. When PbO buffer layer was inserted between the PZT thin film and the Si substrate, the crystallization of the PZT thin films was considerably improved and the processing temperature was lowered. From the result of an X-ray Photoelectron Spectroscopy (XPS) depth profile result, we could confirm that the substrate temperature for the layer of PbO affects the chemical states of the interface between the PbO buffer layer and the Si substrate, which results in the inter-diffusion of Pb. The MFIS with the PbO buffer layer show the improved electric properties including the high memory window and low leakage current density. In particular, the maximum value of the memory window is 2.0V under the applied voltage of 9V for the Pt/PZT(200 nm, $400^{\circ}C)/PbO(80 nm)/Si$ structures with the PbO buffer layer deposited at the substrate temperature of $300^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.73-74
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• 2006

Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.4 s.37
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• pp.339-343
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• 2005

Pt-$SrBi_2Nb_2O_9(SBN)-Pt-Y_2O_3-Si$ gate field effect transistors (MFMISFETs) have been fabricated and the SBN thin films are rapid thermal annealed in oxygen plasma. The grain size of the SBN becomes 4 times much larger than that of furnace annealed SBN films even at the same annealing temperature of $700^{\circ}C$, remnant polarization value of Pt-SBN-Pt is improved by 2 times. Using the rapid grain growth of SBN for the MFM-ISFET, memory window and programming characteristics of on/off states are fairly well improved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.851-856
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• 2003

We have investigated the material and electrical properties of $Bi_{4-x}La_xTi_3O_{12}$ (BLT) ferroelectric thin film for ferroelectric nonvolatile memory applications of capacitor type and single transistor type. The 120nm thick BLT films were deposited on $Pt/Ti/SiO_2/Si$ and $SiO_2/Nitride/SiO_2$ (ONO) substrates by the sol-gel spin coating method and were annealed at $700^{\circ}C$. It was observed that the crystallographic orientation of BLT thin films were strongly affected by the excess Bi content and the intermediate rapid thermal annealing (RTA) treatment conditions regardeless of two type substrates. However, the surface microstructure and roughness of BLT films showed dependence of two different type substrates with orientation of (111) plane and amorphous phase. As increase excess Bi content, the crystallographic orientation of the BLT films varied drastically in BLT films and exhibited well-crystallized phase. Also, the conversion of crystallographic orientation at intermediate RTA temperature of above $450^{\circ}C$ started to be observed in BLT thin films with above excess 6.5% Bi content and the rms roughness of films is decreased. We found that the electrical properties of BLT films such as the P-V hysteresis loop and leakage current were effectively modulated by the crystallographic orientations change of thin films.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.11-16
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• 2002

In this study, the dry etching characteristics of $SrBi_2Ta_2O_9$ (SBT) thin films were investigated by using ICP-RIE (inductively coupled plasma-reactive ion etching). The etching damage and degradation were analyzed with XPS (X-ray photoelectron spectroscopy) and C-V (Capacitance-Voltage) measurement. The etching rate increased with increasing the ICP power and the capacitively coupled plasma (CCP) power. The etch rate of 900$\AA$/min was obtained with 700 W of ICP power and 200 W of CCP power. The main problem of dry etching is the degradation of the ferroelectric material. The damage-free etching characteristics were obtained with the $Ar/C1_2/CHF_3$ gas mixture of 20/14/2 when the ICP power and CCP power were biased at 700 W and 200 W, respectively. The experimental results show that the dry etching process with ICP-RIE is applicable to the fabrication of the single transistor type ferroelectric memory device.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.257-257
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• 2016

최근에 메모리의 초고속화, 고집적화 및 초절전화가 요구되면서 resistive random access memory (ReRAM), ferroelectric RAM (FeRAM), phase change RAM (PRAM)등과 같은 차세대 메모리 기술이 활발히 연구되고 있다. 다양한 메모리 중에서 특히 resistive random access memory (ReRAM)는 빠른 동작 속도, 낮은 동작 전압, 대용량화와 비휘발성 등의 장점을 가진다. ReRAM 소자는 절연막의 저항 스위칭(resistance switching) 현상을 이용하여 동작하기 때문에 SiOx, AlOx, TaOx, ZrOx, NiOx, TiOx, 그리고 HfOx 등과 같은 금속 산화물에 대한 연구들이 활발하게 이루어지고 있다. 이와 같이 다양한 산화물 중에서 AlOx는 ReRAM의 절연막으로 적용되었을 때, 우수한 저항변화특성과 안정성을 가진다. 하지만, AlOx 박막을 형성하기 위하여 기존에 많이 사용되어지던 PVD (physical vapour deposition) 또는 CVD (chemical vapour deposition) 방법에서는 두께가 균일하고 막질이 우수한 박막을 얻을 수 있지만 고가의 진공장비 사용 및 대면적 공정이 곤란하다는 문제점이 있다. 한편, 용액 공정 방법은 공정과정이 간단하여 경제적이고 대면적화가 가능하며 저온에서 공정이 이루어지는 장점으로 많은 관심을 받고 있다. 본 연구에서는 sputtering 방법과 용액 공정 방법으로 형성한 AlOx 기반의 ReRAM에서 메모리 특성을 비교 및 평가하였다. 먼저, p-type Si 기판 위에 습식산화를 통하여 SiO2 300 nm를 성장시킨 후, electron beam evaporation으로 하부 전극을 형성하기 위하여 Ti와 Pt를 각각 10 nm와 100 nm의 두께로 증착하였다. 이후, 제작된 AlOx 용액을 spin coating 방법으로 1000 rpm 10 초, 6000 rpm 30 초의 조건으로 증착하였다. Solvent 및 불순물 제거를 위하여 $180^{\circ}C$의 온도에서 10 분 동안 열처리를 진행하였고, 상부 전극을 형성하기 위해 shadow mask를 이용하여 각각 50 nm, 100 nm 두께의 Ti와 Al을 electron beam evaporation 방법으로 증착하였다. 측정 결과, 용액 공정 방법으로 형성한 AlOx 기반의 ReRAM에서는 기존의 sputtering 방법으로 제작된 ReRAM에 비해서 저항 분포가 균일하지는 않았지만, 103 cycle 이상의 우수한 endurance 특성을 나타냈다. 또한, 1 V 내외로 동작 전압이 낮았으며 104 초 동안의 retention 측정에서도 메모리 특성이 일정하게 유지되었다. 결론적으로, 간단한 용액 공정 방법은 ReRAM 소자 제작에 많이 이용될 것으로 기대된다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.221-225
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• 2003

The MFIS-FET(Field Effect Transistor) devices using $BLT/Y_2O_3$ buffer layer on p-Si(100) substrates were fabricated by the Sol-Gel method and conventional memory processes. The crystal structure, morphologies and electrical properties of prepared devices were investigated by using various measuring techniques. From the C-V(capacitance-voltage) data at 5V, the memory window voltage of the $Pt/BLT/Y_2O_3/si$ structure decreased from 1.4V to 0.6V with increasing the annealing temperature from $700^{\circ}C\;to\;750^{\circ}C$. The drain current (Ic) as a function of gate voltages $(V_G)$ for the $MFIS(Pt/BLT/Y_2O_3/Si(100))-FET$ devices at gate voltages $(V_G)$ of 3V, 4V and 5V, the memory window voltages increased from 0.3V to 0.8V as $V_G$ increased from 3V to 5V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.160-160
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• 2009

In recent years, the merging of nanomaterials and nano-technology into electro-optic (EO) device technology such as liquid crystal displays (LCDs) has attracted much attention because of their unique electro- and magneto-optic properties and novel display applications. One example of hybrid LC-inorganic systems is semiconductor nanorods added to LC for their strong reorientation effect and tunable refractive index. Doping of nanoparticles in LC or polymers can lead to changes in performance characteristics such as electro-optical, dielectric, memory effect, phase behavior, etc. Due to the tunability of LCDs with mixed inorganic materials, low voltage operation of a LC system can also be achieved using the significant electro-optical effect achieved through suspension of ferroelectric nanoparticles in NLC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.125-125
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• 2009

유기물 강유전체 재료를 이용한 비휘발성 메모리에 대한 연구가 활발하게 진행되고 있다. 현재까지 알려진 대표적인 재료는 P(VDF-TrFE)이다. P(VDF-TrFE)는 결정화 온도가 낮기 때문에 저온공정이 가능하여 향 후 플렉서블 소자 응용에도 유망하다. 최근의 연구결과에서는 고유전율의 절연층을 삽입함으로써 누설전류를 감소시켜, 저전압에서 우수한 강유전성이 얻어질이 보고되고 있다. 본 논문에서는 P(VDF-TrFE)의 조성 변화를 통하여 최적의 강유전성이 얻어지는 조건을 찾고자 노력하였으며, 조성 변화에 따른 구조적, 전기적 특성에 대하여 보고한다.

• Proceedings of the Korean Fiber Society Conference
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• 2007.11a
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• pp.123-126
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• 2007