• Title/Summary/Keyword: error elimination

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The Performance Analysis of Burst Error Elimination CVDF Algorithm Using Switching Remote Direction Finding Antenna in VHF (VHF대역에서 원격운용 방향탐지안테나 소자의 스위칭에 의한 상관벡터방향탐지 버스트에러 제거 알고리즘 성능분석)

  • Won, Jong-Mook
    • Journal of the Korea Institute of Military Science and Technology
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    • v.10 no.3
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    • pp.129-138
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    • 2007
  • Recently, Direction Finding(DF) System is using switching DF algorithm to reduce system-weight by eliminating RF cable as much as possible. Also, Correlation Vector Direction Finding(CVDF) algorithms is being used for Fast Direction finding in tactical environment. In this paper, I will give you burst error elimination algorithms and compare the performance in case we use switching CVDF algorithm. Although antenna array is not working, we will successfully perform direction finding when we use this burst error elimination algorithms. Also, we will be completely capable of DF mission despite of meeting the unwanted situation that the monitoring signal disappear in case we use Switching Direction Finding algorithms. That situation frequently occurs under the Frequency Hopping signal circumstances.

Residual Synchronization Error Elimination in OFDM Baseband Receivers

  • Hu, Xingbo;Huang, Yumei;Hong, Zhiliang
    • ETRI Journal
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    • v.29 no.5
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    • pp.596-606
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    • 2007
  • It is well known that an OFDM receiver is vulnerable to synchronization errors. Despite fine estimations used in the initial acquisition, there are still residual synchronization errors. Though these errors are very small, they severely degrade the bit error rate (BER) performance. In this paper, we propose a residual error elimination scheme for the digital OFDM baseband receiver aiming to improve the overall BER performance. Three improvements on existing schemes are made: a pilot-aided recursive algorithm for joint estimation of the residual carrier frequency and sampling time offsets; a delay-based timing error correction technique, which smoothly adjusts the incoming data stream without resampling disturbance; and a decision-directed channel gain update algorithm based on recursive least-squares criterion, which offers faster convergence and smaller error than the least-mean-squares algorithms. Simulation results show that the proposed scheme works well in the multipath channel, and its performance is close to that of an OFDM system with perfect synchronization parameters.

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A Study on the Gross Error Elimination of Image Coordinates (상좌표에 포함된 과대오차의 제거방법에 관한 연구)

  • 박홍기;유복모
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.4 no.2
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    • pp.88-93
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    • 1986
  • A gross error of the observation, in least squares abjustment from the linear model, have an effect on the residuals which are correlated. Therefore the testing procedure by Baarda, which is based on the standardized residual, is modified and varied. In is paper, presented methods which have been suggested for multiple gross error elimination are analized, and applied to the gross error elimination of image coordinates.

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A FAST PARTIAL DISTORTION ELIMINATION ALGORITHM USING IMPROVED SUB-BLOCK MATCHING SCAN

  • Kim, Jong-Nam;Ryu, Tae-Kyung;Moon, Kwang-Seok
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.278-281
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    • 2009
  • In this paper, we propose a fast partial distortion algorithm using normalized dithering matching scan to get uniform distribution of partial distortion which can reduce only unnecessary computation significantly. Our algorithm is based on normalized dithering order matching scan and calibration of threshold error using LOG value for each sub-block continuously for efficient elimination of unlike candidate blocks while keeping the same prediction quality compared with the full search algorithm. Our algorithm reduces about 60% of computations for block matching error compared with conventional PDE (partial distortion elimination) algorithm without any prediction quality, and our algorithm will be useful to real-time video coding applications using MPEG-4 AVC or MPEG-2.

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A Two-Step Screening Algorithm to Solve Linear Error Equations for Blind Identification of Block Codes Based on Binary Galois Field

  • Liu, Qian;Zhang, Hao;Yu, Peidong;Wang, Gang;Qiu, Zhaoyang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.9
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    • pp.3458-3481
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    • 2021
  • Existing methods for blind identification of linear block codes without a candidate set are mainly built on the Gauss elimination process. However, the fault tolerance will fall short when the intercepted bit error rate (BER) is too high. To address this issue, we apply the reverse algebra approach and propose a novel "two-step-screening" algorithm by solving the linear error equations on the binary Galois field, or GF(2). In the first step, a recursive matrix partition is implemented to solve the system linear error equations where the coefficient matrix is constructed by the full codewords which come from the intercepted noisy bitstream. This process is repeated to derive all those possible parity-checks. In the second step, a check matrix constructed by the intercepted codewords is applied to find the correct parity-checks out of all possible parity-checks solutions. This novel "two-step-screening" algorithm can be used in different codes like Hamming codes, BCH codes, LDPC codes, and quasi-cyclic LDPC codes. The simulation results have shown that it can highly improve the fault tolerance ability compared to the existing Gauss elimination process-based algorithms.

The improvement of rapid response and the elimination of study state error of variable structure control systems (가변구조제어계의 속응성 향상및 정상상태오차의 제거)

  • 김중완;이만형
    • 제어로봇시스템학회:학술대회논문집
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    • 1988.10a
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    • pp.261-263
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    • 1988
  • In this study, the several control laws and switching planes are considered to eliminate the steady state error and to obtain the rapid response for variable structure control systems. An elimination algorithm is achieved by combination with each other control law, and the type of control law having the most rapid response is shown through some simulations.

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A Study on Performance Enhancement of Distance Relaying by DC Offset Elimination Filter (직류옵셋제거필터에 의한 거리계전기법의 성능 개선에 관한 연구)

  • Lee, Kyung-Min;Park, Yu-Yeong;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.2
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    • pp.67-73
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    • 2015
  • Distance relay is widely used for the protection of long transmission line. Most of distance relay used to calculate line impedance by measuring voltage and current using DFT. So if there is a computation error due to the influence of phasor by DC offset component, due to excessive vibration by measuring line impedance, overreach or underreach can be occurs, and then abnormal and non-operation of distance relay can be issue. It is very important to implement the robust distance relaying that is not affected by DC offset component. This paper describes an enhanced distance relaying based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any prior information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced distance relay uses fault current as well as residual current. The behavior of the proposed distance relaying using off-line simulation has been verified using data about several fault conditions generated by the ATP simulation software.

A STUDY ON THE GROSS ERROR DETECTION AND ELIMINATION IN BUNDLE BLOCK ADJUSTMENT (번들블럭조정에 있어서 과대오차 탐색 및 제거에 관한 연구)

  • 유복모;조기성;신성웅
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.9 no.1
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    • pp.47-54
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    • 1991
  • In this study, the accuracy of three dimensional location was improved by self calibration bundle method with additional parameter, which is to correct systematic error through detection and elimination of the gross error from updated reference variance for observation values in photogram-metry. In this study, with the result of comparing accuracy of each method, correcting systematic error is more effective after gross error detection and when observation values are contained more than two gross error the point with maximum correlation value is detected by masking effect of least square adjustment.

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Image Interpolation Using Iterative Error Elimination (반복적 오차 제거를 이용한 영상 보간법)

  • Kim, Won-Hee;Piao, Fengji;Kim, Jong-Nam;Moon, Kwang-Seok
    • Journal of Korea Multimedia Society
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    • v.14 no.8
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    • pp.1000-1009
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    • 2011
  • Image interpolation is a technique which estimates the non-allocated pixel values on image scale-transform. It requires minimum computational complexity and minimum image quality degradation on the interpolated resultant images. In this paper we propose an image interpolation method using iterative error estimation. The proposed method consists of the following five steps: loss-information computational step, loss-information estimation step, loss-information application step, error computation step, and error application step. The experimental results obtained show that the average PSNR is increased by 3.3dB, subjective image quality is enhanced and the minimum computation complexity is decreased by 83%. The proposed image interpolation algorithm may be helpful in various applications such as image reconstruction and enlargement.

Elimination of the State-of-Charge Errors for Distributed Battery Energy Storage Devices in Islanded Droop-controlled Microgrids

  • Wang, Weixin;Wu, Fengjiang;Zhao, Ke;Sun, Li;Duan, Jiandong;Sun, Dongyang
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.1105-1118
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    • 2015
  • Battery energy storage devices (ESDs) have become more and more commonplace to maintain the stability of islanded power systems. Considering the limitation in inverter capacity and the requirement of flexibility in the ESD, the droop control was implemented in paralleled ESDs for higher capacity and autonomous operation. Under the conventional droop control, state-of-charge (SoC) errors between paralleled ESDs is inevitable in the discharging operation. Thus, some ESDs cease operation earlier than expected. This paper proposes an adaptive accelerating parameter to improve the performance of the SoC error eliminating droop controller under the constraints of a microgrid. The SoC of a battery ESD is employed in the active power droop coefficient, which could eliminate the SoC error during the discharging process. In addition, to expedite the process of SoC error elimination, an adaptive accelerating parameter is dedicated to weaken the adverse effect of the constraints due to the requirement of the system running. Moreover, the stability and feasibility of the proposed control strategy are confirmed by small-signal analysis. The effectiveness of the control scheme is validated by simulation and experiment results.