• Title/Summary/Keyword: error check

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Simplified 2-Dimensional Scaled Min-Sum Algorithm for LDPC Decoder

  • Cho, Keol;Lee, Wang-Heon;Chung, Ki-Seok
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1262-1270
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    • 2017
  • Among various decoding algorithms of low-density parity-check (LDPC) codes, the min-sum (MS) algorithm and its modified algorithms are widely adopted because of their computational simplicity compared to the sum-product (SP) algorithm with slight loss of decoding performance. In the MS algorithm, the magnitude of the output message from a check node (CN) processing unit is decided by either the smallest or the next smallest input message which are denoted as min1 and min2, respectively. It has been shown that multiplying a scaling factor to the output of CN message will improve the decoding performance. Further, Zhong et al. have shown that multiplying different scaling factors (called a 2-dimensional scaling) to min1 and min2 much increases the performance of the LDPC decoder. In this paper, the simplified 2-dimensional scaled (S2DS) MS algorithm is proposed. In the proposed algorithm, we figure out a pair of the most efficient scaling factors which multiplications can be replaced with combinations of addition and shift operations. Furthermore, one scaling operation is approximated by the difference between min1 and min2. The simulation results show that S2DS achieves the error correcting performance which is close to or outperforms the SP algorithm regardless of coding rates, and its computational complexity is the lowest comparing to modified versions of MS algorithms.

Design of Quasi-Cyclic Low-Density Parity Check Codes with Large Girth

  • Jing, Long-Jiang;Lin, Jing-Li;Zhu, Wei-Le
    • ETRI Journal
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    • v.29 no.3
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    • pp.381-389
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    • 2007
  • In this paper we propose a graph-theoretic method based on linear congruence for constructing low-density parity check (LDPC) codes. In this method, we design a connection graph with three kinds of special paths to ensure that the Tanner graph of the parity check matrix mapped from the connection graph is without short cycles. The new construction method results in a class of (3, ${\rho}$)-regular quasi-cyclic LDPC codes with a girth of 12. Based on the structure of the parity check matrix, the lower bound on the minimum distance of the codes is found. The simulation studies of several proposed LDPC codes demonstrate powerful bit-error-rate performance with iterative decoding in additive white Gaussian noise channels.

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Rate-Compatible LDPC Codes Based on the PEG Algorithm for Relay Communication Systems

  • Zhou, Yangzhao;Jiang, Xueqin;Lee, Moon Ho
    • Journal of Communications and Networks
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    • v.17 no.4
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    • pp.346-350
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    • 2015
  • It is known that the progressive edge-growth (PEG) algorithm can be used to construct low-density parity-check (LDPC) codes at finite code lengths with large girths through the establishment of edges between variable and check nodes in an edge-by-edge manner. In [1], the authors derived a class of LDPC codes for relay communication systems by extending the full-diversity root-LDPC code. However, the submatrices of the parity-check matrix H corresponding to this code were constructed separately; thus, the girth of H was not optimized. To solve this problem, this paper proposes a modified PEG algorithm for use in the design of large girth and full-diversity LDPC codes. Simulation results indicated that the LDPC codes constructed using the modified PEG algorithm exhibited a more favorable frame error rate performance than did codes proposed in [1] over block-fading channels.

New Message-Passing Decoding Algorithm of LDPC Codes by Partitioning Check Nodes (체크 노드 분할에 의한 LDPC 부호의 새로운 메시지 전달 복호 알고리즘)

  • Kim Sung-Hwan;Jang Min-Ho;No Jong-Seon;Hong Song-Nam;Shin Dong-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.4C
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    • pp.310-317
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    • 2006
  • In this paper, we propose a new sequential message-passing decoding algorithm of low-density parity-check (LDPC) codes by partitioning check nodes. This new decoding algorithm shows better bit error rate(BER) performance than that of the conventional message-passing decoding algorithm, especially for small number of iterations. Analytical results tell us that as the number of partitioned subsets of check nodes increases, the BER performance becomes better. We also derive the recursive equations for mean values of messages at variable nodes by using density evolution with Gaussian approximation. Simulation results also confirm the analytical results.

Decentralized Dynamic Surface Control for Large-Scale Interconnected Systems (연결식 대형시스템을 위한 분산 동적 표면 제어)

  • Song Bong-Sob
    • Journal of Institute of Control, Robotics and Systems
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    • v.12 no.4
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    • pp.339-345
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    • 2006
  • An analysis methodology of Decentralized Dynamic Surface Control (DDSC) for the large-scale interconnected nonlinear systems is presented in this paper. While the centralized DSC approach proposed in [14] has a difficulty to check the quadratic stability for the large-scale systems numerically due to dramatic increases of the order of overall augmented error dynamics, DDSC is relatively easy to check the quadratic stability since lower order error dynamics of individual subsystems are used. Then, a systematic procedure for designing DDSC will be developed. Furthermore, after a quadratic function containing a reachable set is defined, it will be calculated numerically to indicate the performance of DDSC in the framework of convex optimization. Finally an illustrative example will be given for showing the advantages of DDSC compared with other decentralized nonlinear control techniques.

A Variable Rate LDPC Coded V-BLAST System (가변 부호화 율을 가지는 LDPC 부호화된 V-BLAST 시스템)

  • Noh, Min-Seok;Kim, Nam-Sik;Park, Hyun-Cheol
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.55-58
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    • 2004
  • This this paper, we propose vertical Bell laboratories layered space time (V-BLAST) system based on variable rate Low-Density Parity Check (LDPC) codes to improve performance of receiver when QR decomposition interference suppression combined with interference cancellation is used over independent Rayleigh fading channel. The different rate LDPC codes can be made by puncturing some rows of a given parity check matrix. This allows to implement a single encoder and decoder for different rate LDPC codes. The performance can be improved by assigning stronger LDPC codes in lower layer than upper layer because the poor SNR of first detected data streams makes error propagation. Keeping the same overall code rates, the V-BLAST system with different rate LDPC codes has the better performance (in terms of Bit Error Rate) than with constant rate LDPC code in fast fading channel.

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Efficient Parallel Block-layered Nonbinary Quasi-cyclic Low-density Parity-check Decoding on a GPU

  • Thi, Huyen Pham;Lee, Hanho
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.210-219
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    • 2017
  • This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

On Combining Chase-2 and Sum-Product Algorithms for LDPC Codes

  • Tong, Sheng;Zheng, Huijuan
    • ETRI Journal
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    • v.34 no.4
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    • pp.629-632
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    • 2012
  • This letter investigates the combination of the Chase-2 and sum-product (SP) algorithms for low-density parity-check (LDPC) codes. A simple modification of the tanh rule for check node update is given, which incorporates test error patterns (TEPs) used in the Chase algorithm into SP decoding of LDPC codes. Moreover, a simple yet effective approach is proposed to construct TEPs for dealing with decoding failures with low-weight syndromes. Simulation results show that the proposed algorithm is effective in improving both the waterfall and error floor performance of LDPC codes.

An Improvement of UMP-BP Decoding Algorithm Using the Minimum Mean Square Error Linear Estimator

  • Kim, Nam-Shik;Kim, Jae-Bum;Park, Hyun-Cheol;Suh, Seung-Bum
    • ETRI Journal
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    • v.26 no.5
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    • pp.432-436
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    • 2004
  • In this paper, we propose the modified uniformly most powerful (UMP) belief-propagation (BP)-based decoding algorithm which utilizes multiplicative and additive factors to diminish the errors introduced by the approximation of the soft values given by a previously proposed UMP BP-based algorithm. This modified UMP BP-based algorithm shows better performance than that of the normalized UMP BP-based algorithm, i.e., it has an error performance closer to BP than that of the normalized UMP BP-based algorithm on the additive white Gaussian noise channel for low density parity check codes. Also, this algorithm has the same complexity in its implementation as the normalized UMP BP-based algorithm.

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Computer Aided Design Verification System of CAD Drawings Drawn with CAD System(The Case of Considering to Annular Parts) (CAD시스템을 이용하여 작성한 도면의 설계검증시스템(회전체를 고려한 경우))

  • 이성수
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1996.11a
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    • pp.593-597
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    • 1996
  • This paper describes a method for drawing check of dimension errors, such as deficiency and redundancy of dimensions, input-errors in dimension figures and symbols, etc. The logic for finding dimensional errors is written by using the Turbo C language. Checking for deficiency and redundancy of global dimensions has been performed applying Graph Theory. Especialy, this paper gives an account of checking method for annular parts.

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