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Electronics and Telecommunications Research Institute (한국전자통신연구원)
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On Combining Chase-2 and Sum-Product Algorithms for LDPC Codes

  • Tong, Sheng (State Key Lab. of ISN, Xidian University) ;
  • Zheng, Huijuan (Department of Telecommunication, Xi'an University of Posts and Telecommunications)
  • Received : 2011.12.03
  • Accepted : 2012.03.07
  • Published : 2012.08.30
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Abstract

This letter investigates the combination of the Chase-2 and sum-product (SP) algorithms for low-density parity-check (LDPC) codes. A simple modification of the tanh rule for check node update is given, which incorporates test error patterns (TEPs) used in the Chase algorithm into SP decoding of LDPC codes. Moreover, a simple yet effective approach is proposed to construct TEPs for dealing with decoding failures with low-weight syndromes. Simulation results show that the proposed algorithm is effective in improving both the waterfall and error floor performance of LDPC codes.

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References

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  2. F.R. Kschischang, B.J. Frey, and H. Andrea Loeliger, "Factor Graphs and the Sum-Product Algorithm," IEEE Trans. Inf. Theory, vol. 47, no. 2, Feb. 2001, pp. 498-519. https://doi.org/10.1109/18.910572
  3. R.G. Gallager, Low-Density Parity-Check Codes, PhD dissertation, MIT, Cambridge, MA, USA, July 1963.
  4. J. Hagenauer, E. Offer, and L. Papke, "Iterative Decoding of Binary Block and Convolutional Codes," IEEE Trans. Inf. Theory, vol. 42, no. 3, Mar. 1996, pp. 429-445. https://doi.org/10.1109/18.485714
  5. D. MacKay and M.S. Postol, "Weaknesses of Margulis and Ramanujan-Margulis Low-Density Parity-Check Codes," Electron. Notes Theoretical Computer Sci., vol. 74, 2003.
  6. T.J. Richardson, "Error Floors of LDPC Codes," Proc. 41st Annual Allerton Conf. Commun., Control, Computing, Monticello, IL, USA, Sept. 2003, pp. 1426-1435.

Cited by

  1. Improved Reliability-Based Iterative Decoding of LDPC Codes Based on Dynamic Threshold vol.37, pp.4, 2012, https://doi.org/10.4218/etrij.15.0113.1265