ETRI Journal

Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Design of Quasi-Cyclic Low-Density Parity Check Codes with Large Girth

  • Jing, Long-Jiang (College of Electronic Engineering, University of Electronic Science and Technology of China) ;
  • Lin, Jing-Li (College of Electronic Engineering, University of Electronic Science and Technology of China) ;
  • Zhu, Wei-Le (College of Electronic Engineering, University of Electronic Science and Technology of China)
  • Received : 2006.09.05
  • Published : 2007.06.30
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Abstract

In this paper we propose a graph-theoretic method based on linear congruence for constructing low-density parity check (LDPC) codes. In this method, we design a connection graph with three kinds of special paths to ensure that the Tanner graph of the parity check matrix mapped from the connection graph is without short cycles. The new construction method results in a class of (3, ${\rho}$)-regular quasi-cyclic LDPC codes with a girth of 12. Based on the structure of the parity check matrix, the lower bound on the minimum distance of the codes is found. The simulation studies of several proposed LDPC codes demonstrate powerful bit-error-rate performance with iterative decoding in additive white Gaussian noise channels.

Keywords