• Applied Microscopy
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• 제46권3호
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• pp.155-159
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• 2016

This paper analyses the relationship between the distribution of a dielectric layer on the apex of a metal field electron emitter and the distribution of electron emission. Emitters were prepared by coating a tungsten emitter with a layer of epoxylite resin. A high-resolution scanning electron microscope was used to monitor the emitter profile and measure the coating thickness. Field electron microscope studies of the emission current distribution from these composite emitters (Tungsten-Clark Electromedical Instruments Epoxylite resin [Tungsten/CEI-resin emitter]) have been carried out. Two forms of image have been observed: bright single-spot images, thought to be associated with a smooth substrate and a uniform dielectric layer; and multi-spot images, though to be associated with irregularity in the substrate or the dielectric layer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.63-66
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• 2000

In this paper, we present the simulation of the heterojunction bipolar transistor with different Emitter-Base junction structures. Our simulation results include effect of setback and graded layer. We prove the emitter efficiency's improvement through setback and graded layer. In 1995, the analytical equations of electric field, electrostatic potential, and junction capacitance for abrupt and linearly graded heterojunctions with or without a setback layer was derived. But setback layer and linearly graded layer's recombination current was considered numerically. Later, recombination current model included setback layer and graded layer will be proposed. New recombination current model also wile include abrupt heterojunction's recombination current model. In this paper, the material parameters of the heterojunction bipolar transistor with different Emitter-Base junction structures is introduced.

• Journal of the Optical Society of Korea
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• 제18권6호
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• pp.732-738
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• 2014

Combined optical simulation of the ray-tracing technique and the finite difference time domain method was used to investigate the effect of the emitter orientation and the photonic crystal layer on the outcoupling efficiency (OCE) of bottom-emission type organic light emitting diodes (OLEDs). The OLED with a horizontal emitter exhibited an opposite interference effect to that of one with a vertical emitter, which suggested that the OCE would be very sensitive to the emitter orientation at a fixed emitter-cathode distance. The OLED with a horizontal emitter exhibited much larger OCE than that with a vertical emitter did, which was due to the substantial difference in the radiation pattern along with the different coupling with the surface plasmon excitation. The OCE with a horizontal emitter was increased by approximately 1.3 times by inserting a photonic crystal layer between the indium tin oxide layer and the glass substrate. The present study suggested that appropriate control of the emitter orientation and its combination to other outcoupling structures could be used to enhance the OCE of OLEDs substantially.

• 한국재료학회지
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• 제31권12호
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• pp.727-731
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• 2021

In this study, we have investigated a selective emitter using a UV laser on BBr₃ diffusion doping layer. The selective emitter has two regions of high and low doping concentration alternatively and this structure can remove the disadvantages of homogeneous emitter doping. The selective emitters were fabricated by using UV laser of 355 nm on the homogeneous emitters which were formed on n-type Si by BBr₃ diffusion in the furnace and the heavy boron doping regions were formed on the laser regions. In the optimized laser doping process, we are able to achieve a highly concentrated emitter with a surface resistance of up to 43 Ω/□ from 105 ± 6 Ω/□ borosilicate glass (BSG) layer on Si. In order to compare the characteristics and confirm the passivation effect, the annealing is performed after Al₂O₃ deposition using an ALD. After the annealing, the selective emitter shows a better effect than the high concentration doped emitter and a level equivalent to that of the low concentration doped emitter.

• 한국전기전자재료학회논문지
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• 제20권3호
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• pp.268-272
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• 2007

A fully integrable InP/InGaAs HPT with an ITO emitter contact was first fabricated by employing a $SiO_2$ passivation layer. The electrical and the optical characteristics of the HPT with a passivation layer were measured and compared with those of the HPT without a passivation layer. The only noticeable difference was the increased emitter series resistance of the HPT with a passivation layer. AES analysis was performed to explain the reason of the increased emitter series resistance. Results show that PECVD $SiO_2$ deposition and annealing processes cause the diffusion of oxygen to the interface and the depletion of tin at the interface, which may be responsible for the increase of the series resistance.

• Current Photovoltaic Research
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• 제3권3호
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• pp.80-84
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• 2015

We suggest new emitter formation method using solid-phase epitaxy (SPE); solid-phase epitaxy emitter (SEE). This method expect simplification and cost reduction of process compared with furnace process (POCl3 or BBr3). The solid-phase epitaxy emitter (SEE) deposited a-Si:H layer by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD) on substrate (c-Si), then thin layer growth solid-phase epitaxy (SPE) using rapid thermal process (RTP). This is possible in various emitter profile formation through dopant gas ($PH_3$) control at deposited a-Si:H layer. We fabricated solar cell to apply solid-phase epitaxy emitter (SEE). Its performance have an effect on crystallinity of phase transition layer (a-Si to c-Si). We confirmed crystallinity of this with a-Si:H layer thickness and annealing temperature by using raman spectroscopy, spectroscopic ellipsometry and transmission electron microscope. The crystallinity is excellent as the thickness of a-Si layer is thin (~50 nm) and annealing temperature is high (<$900^{\circ}C$). We fabricated a 16.7% solid-phase epitaxy emitter (SEE) cell. We anticipate its performance improvement applying thin tunnel oxide (<2nm).

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.590-590
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• 2012

A transparent conducting oxide (TCO) layer was applied in crystalline Si (c-Si) solar cells without use of the conventional SiNx-coating. A high quality indium-tin-oxide (ITO) layer was directly deposited on an emitter layer of a Si wafer. Three different types of emitters were formed by controlling the phosphorous diffusion condition. A light-doped emitter forming a thinner emitter junction showed an improved photoconversion efficiency of 14.1% comparing to 13.2% of a heavy-doped emitter. This was induced by lower recombination within a narrower depletion region of the light-doped emitter. In the aspect of light management, the intermediate refractive index of ITO is effective to reduce the light reflection leading the enhanced carrier generation in a Si absorber. For the electrical aspect, the ITO layer serves as an efficient electrical conductor and thus relieves the burden of high contact resistance of the light-doped emitter. Additionally, the ITO works as a buffer layer of Ag and Si and certainly prevents the shunting problem of Ag penetration into Si emitter region. It discusses an efficient design scheme of TCO-embedded emitter Si solar cells.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.233-233
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• 2010

It is important to form the n+ emitter layer for generating electric potential collecting EHP(Electron-Hole Pair). In this paper the formation on the n+ emitter layer of silicon wafer has been made with respect to uniformity of shallow diffusion from a liquid source. The starting material was crystalline silicon wafers of resistivity $0.5{\sim}3\{Omega}{\cdot}cm$, p-type, thickness $200{\mu}m$, direction[100]. The formation of n+ emitter layer from the liquid $POCl_3$ source was carried out for $890^{\circ}C$ in an ambient of $N_2:O_2$::10:1 by volume. And than each conditions are pre-deposition and drive-in time. It has been made uniformity of at least. so, the average of sheet resistance was about 0.12%. In this study, sheet resistance was measured by 4-point prove.

• Transactions on Electrical and Electronic Materials
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• 제3권1호
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• pp.4-8
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• 2002

The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

• 신재생에너지
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• 제4권2호
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• pp.74-80
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• 2008

To improve the blue responses of screen-printed single crystalline silicon solar cells, we investigated an emitter etch-back technique to obtain high emitter sheet resistances, where the defective dead layer on the emitter surface was etched and became thinner as the etch-back time increased, resulting in the monotonous increase of short circuit current and open circuit voltage. We found that an optimal etch-back time should be determined to achieve the maximal performance enhancement because of fill factor decrease due to a series resistance increment mainly affected by contact and lateral resistance in this case. To elucidate the reason for the fill factor decrease, we studied the resistance analysis by potential mapping to determine the contact and the lateral series resistance. As a result, we found that the fill factor decrease was attributed to the relatively fast increase of contact resistance due to the dead layer thinning down with the lowest contact resistivity when the emitter was contacted with screen-printed silver electrode.