• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.397-400
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• 1997

This paper presentes the characteristics of Si anisotropic etching and electrochemical etch-stop in aqueous TMAH/IPA/pyrazine solution. (100) Si etching rate of 0.747 $\mu\textrm{m}$/min which faster 86% than TMAH 25 wt.%/IPA 17 vol.% solution was obtained using best etching condition at TMAH 25 wt.%/IPA 17 vol.%/pyrazine 0.1 g and the etching rate of (100) Si was decreased with more additive quantity of pyrazine. I-V curve of p-type Si in TMAH/IPA/pyrazine was obtained. OCP(Open Circuit Potential) and PP(Passivation Potential) were -2 V and -0.9 V, respectively. Si diaphragms were obtained by electrochemical etch-stop in aqueous TMAH/IPA/pyrazine solution.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.423-426
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• 1998

Piezoresistive pressure sensors have fabricated using electrochemical etch-stop technique. Si diaphragm having thickness of n-epi. layer was fabricated and used to detect pressure range from 0 to 1 kg/$\textrm{cm}^2$. Piezoresistors were diffused 3${\times}$10$\^$18/ cm$\^$-3/ and placed at diaphragm edge for maximum pressure detection. The characteristics of electrochemical etch-stop in TMAH/lPA/pyrazine solution were also discussed. I-V curves of n and p-type Si in TMAH/lPA/pyrazine solution were obtained. Etching rate is highest at optimum etching condition, TMAH 25wt.%/IPA 17vo1.%/pyrazine 0.1/100m1, thus the elapsed time of etch-stop was reduced.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.741-744
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -760 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.561-564
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• 2000

Silicon capacitive pressure sensor has been fabricated by using electrochemical etching stop and silicon-to-glass electrostatic bonding technique. A diaphragm structure is designed to compensate the nonlinear response. A cavity is etched into the silicon to the depth of 2$\mu\textrm{m}$ by anisotropic etching in 20wt.% TMAH solution at 80$^{\circ}C$. A fabricated sensor showed 3.3 pF zero-pressure capacitance, 297 pp.m/mmHg sensitivity, and a 7.4 7%F.S. nonlinear response in a 0-1 kgf/cm$^2$pressure range.

• Journal of Sensor Science and Technology
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• v.7 no.6
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• pp.426-431
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• 1998

This paper describes electrochemical etch-stop characteristics in THAH/IPA/pyrazine solution. I-V curves of n- and p-type Si in THAH/IPA/pyrazine solution were obtained. OCP(Open Circuit Potential) and PP (Passivation Potential) of p-type Si were -1.2 V and 0.1 V, and of n-type Si were -1.3 V and -0.2 V, respectively. Both n- and p-type Si, etching rates were abruptly decreased at potentials anodic to the PP. The etch-stop characteristics in THAH/IPA/pyrazine solution were observed. Since accurate etching stop occurs at pn junction, Si diaphragms having thickness of epi-layer were fabricated. Etching rate is highest at optimum etching condition, TMAH 25wt.%/IPA 17vol.%/pyrazine 0.1g/100ml. thus the elapsed time of etch-stop was reduced.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.958-962
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• 2002

This paper reports on the fabrication of free-standing microstructures by DRIE (deep reactive ion etching). SOI (Si-on-insulator) structures with buried cavities are fabricated by SDB (Si-wafer direct bonding) technology and electrochemical etch-stop. The cavity was formed the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the formed cavity under vacuum condition at -760 mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing (100$0^{\circ}C$, 60 min.), the SDB SOI structure with a accurate thickness and a good roughness was thinned by electrochemical etch-stop in TMAH solution. Finally, it was fabricated free-standing microstructures by DRIE. This result indicates that the fabrication technology of free-standing microstructures by combination SDB, electrochemical etch-stop and DRIE provides a powerful and versatile alternative process for high-performance bulk micromachining in MEMS fields.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.3
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• pp.223-227
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• 2001

In this paper, the authors present the fabrication of high-yield Si thin-membranes by electrochemical etch-stop in tetramethyl ammonium hydroxide (TMAH): isopropyl alcohol (IPA):pyrazine solutions. The current-voltage (I-V) characteristics of n- and p-type Si in TMAH:IPA;pyrazine solutions were analysed, repsectively. Open circuit potential (OCP)and passivation potential (PP) of n- and p-type Si, respectively, were obtained and applied potential was selected between n- and p-type Si PPs. The electrochemical etch-stop method was applied to the fabrication of 801 micro-membranes with 20.0 $\mu\textrm{m}$ thickness on a 5" Si wafer. The average thickness of fabricated 801 micro-membranes on one wafer 20.03$\mu\textrm{m}$ and the standard deviation was ${\pm}$0.26$\mu\textrm{m}$. The Si surface of the etch-stopped micro-membranes was extremely flat with no noticeable taper or nonuniformity. The results indicate that use of the electrochemical etch-stop method for the etching of Si in TMAH:IPA;pyrazine solutions provides a powerful and versatile alternative process for fabricating high-yield Si micro-membranes.

• Transactions on Electrical and Electronic Materials
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• v.2 no.2
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• pp.26-31
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• 2001

This paper presents the electrochemical etch-stop characteristics of single-crystal Si(001) wafers in tetramethyl ammonium hydroxide(TMAH):isopropyl alcohol(IPA):pyrazine solutions. The addition of pyrazine to TMAH:IPA solutions increased the etch rate of (100) Si, thus the etching time required by the etch-stop process shortened. The current-voltage(I-V) characteristics of n- and p-type Si in TMAH:IPA:pyrazine solutions were obtained, respectively. Open circuit potential(OCP) and passivation potential(PP) of n- and p-type Si, respectively, were obtained and applied potential was selected between n- and p-type Si PPs. The electrochemical etch-stop method was used to fabricate 801 microdiaphragms of 20 ${\mu}{\textrm}{m}$ thickness on a 5-inch Si wafer. The average thickness of fabricated 801 microdiaphragms on one Si wafer was 20.03 ${\mu}{\textrm}{m}$ and the standard deviation was $\pm$0.26 ${\mu}{\textrm}{m}$. The Si surface of the etch-stopped microdiaphragm was extremely flat with no noticeable taper or nonuniformity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.739-742
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• 2002

This paper described on the fabrication of microstructures by DRIE(deep reactive ion etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -760 mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing($1000^{\circ}C$, 60 min.), The SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as an accurate thickness control and a good flatness.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1890-1892
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -750 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.