• Proceedings of the KIPE Conference
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• 2002.11a
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• pp.227-230
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• 2002

The switching device in an inductive circuit is stressed by the over-voltage at the turn-off time. Thus if the peak value of the over-voltage is not properly limited, the switching device may be broken. Therefore, the snubber circuit should be added to protect the switching device from the over-voltage. The circuit designer must be familiar with the design of the snubber This paper tests the possibility that TVS instead of the conventional snubber can be applied to the protection circuit of the switching device without using the complicated design equations, and shows that the rating of TVS can be easily selected by considering only several parameters of TVS. The experimental results show the reduced switching voltage of the switching device at the turn-off time.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.2
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• pp.51-56
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• 2008

High quality power supplying of high voltage distribution lines electric railway system is the important function, high voltage distribution system is complicated witch is compose with distribution line, circuit break, protection facilities and so on. Among this components, role of substation is most important for elevation of reliability in electric power system. Therefore, the enhanced reliability considering the preventive inspection, repair work replacement is necessary. This paper proposes protection method in railway high voltage distribution lines. we model distribution system using PSCAD/EMTDC(Power System Computer Aided Design/Electro Magnetic Transients DC Analysis Program) and extract various fault data. In conclusion this methods can protection of ground fault.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1350-1352
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• 1995

This paper discribed the characteristic of I-t cross-over-point between current limited-fuse and explusion fuse(Bay-O-Net Fuse) and fuse protection in pad-mounted transformer that was generated internal faults and the short circuit of secondary side(load side). In the I-t cross-over-point, current limited fuse was melted when transient recovery voltage was raised rapidly.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2002.11a
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• pp.105-109
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• 2002

A TVS and Varistor are preservative equipment against electro static discharge(ESD). We use a TVS for I/O protection of a circuit which has faster response time than a Varistor. And a Varistor has large power capability, therefore, which be used in input stage for internal pressure prevention. This paper will compare a TVS with a Varistor with respect to response characteristic to ESD in DC 24[V] low voltage circuit.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1401-1403
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• 2002

This paper presents the development of an electronic dash-pot(EDP) system it)r protecting the power electronic circuit. The EDP play role protecting an equipment by disconnecting between voltage source and load system. Also, converting the existed electrical system into an electronic mechanism, it can reduce the power consumption and prevents the system damage due to over current.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.9
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• pp.1858-1864
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• 2009

In this paper, we design a non-volatile memory IP, 1-kb one-time programmable (OTP) memory, used for power management ICs. Since a conventional OTP cell uses an isolated NMOS transistor as an antifuse, there is an advantage of it big cell size with the BCD process. We use, therefore, a PMOS transistor as an antifuse in lieu of the isolated NMOS transistor and minimize the cell size by optimizing the size of a OTP cell transistor. And we add an ESD protection circuit to the OTP core circuit to prevent an arbitrary cell from being programmed by a high voltage between the terminals of the PMOS antifuse when the ESD test is done. Furthermore, we propose a method of turning on a PMOS pull-up transistor of high impedance to eliminate a gate coupling noise in reading a non-programmed cell. The layout size of the designed 1-kb PMOS-type antifuse OTP IP with Dongbu's $0.18{\mu}m$ BCD is $129.93{\times}452.26{\mu}m^2$.

• Journal of the Korean Ceramic Society
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• v.48 no.6
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• pp.525-530
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• 2011

We investigated the electrical properties the starting material and sintering condition on the laminated PTC thermistor for micro circuit protection. The influences of $BaTiO_3$ powder with the 0.3 and 0.45 ${\mu}m$ size and the electrical characteristics (Ba,Sr)$TiO_3$ sintered at 1350~1400$^{\circ}C$ for 2 h in a reducing atmosphere (1% $H_2/N_2$). The sintered (Ba,Sr)$TiO_3$ was increased pore and the grain size was decreased according to increasing Sr additions. In relative permittivity, the phase transition temperature of (Ba,Sr)$TiO_3$ was decreased for 2.5$^{\circ}C$ according to increasing 0.01 mole Sr additions, and the phase transition dose not appeared about 0.3 mole Sr addition. The (Ba,Sr)$TiO_3$ was show the low resistance from 0.01 mole to 0.05 mole by Sr addition, regardless of sintering temperature. The (Ba,Sr)$TiO_3$ was show $10^2$ jump order at 0.1 and 0.2 mole Sr addition, and PTCR of the sintered $(Ba_{0.7}Sr_{0.3})TiO_3$ does not appeared about 0.3 mole Sr addition, regardless of the sintering temperature and starting material size.

• Journal of IKEEE
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• v.15 no.4
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• pp.324-329
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• 2011

In recent years, the performance and functions of portable devices has increased. so it requires more power efficiency and energy density while using the battery for a long time. therefore Battery pack which are made up from several battery cells in series in order to achieve higher operating voltage is being used. when using a Li-ion battery, we need a protection circuit to protect from overcharge, over discharge, high temperature and over current. Also, when using battery pack, we need to Cell voltage balancing circuit that each cell in tune with the balancing. In this paper, the proposed IC is applicable by mobile devices as well as E-bike, hybrid vehicles, electric vehicles, and is expected to contribute to the development of domestic PMIC.

• Journal of IKEEE
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• v.15 no.4
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• pp.330-338
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• 2011

In this paper, a current-mode buck-boost converter using Multiple switching devices is presented. The efficiency of the proposed converter is higher than that of conventional buck-boost converter. In order to improve the power efficiency at the high current level, the proposed converter is controlled with PWM(pulse width modulation) method. The converter has maximum output current 300mA, input voltage 3.3V, output voltage from 700mV to 12V, 1.5MHz oscillation frequency, and maximum efficiency 90%. Moreover, this paper proposes watchdog circuits in order to ensure the reliability and to improve the performance of dc-dc converters. An electrostatic discharge(ESD) protection circuit for deep submicron CMOS technology is presented. The proposed circuit has low triggering voltage using gate-substrate biasing techniques. Simulated result shows that the proposed ESD protection circuit has lower triggering voltage(4.1V) than that of conventional ggNMOS(8.2V).

• Journal of IKEEE
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• v.24 no.4
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• pp.1156-1161
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• 2020

In this paper, we propose a new ESD protection circuit with improved electrical characteristics through structural changes of the existing one-way SCR. The proposed ESD protection circuit has high holding voltage characteristics due to the inserted N+ floating and P+ floating regions, and thus the latch-up immunity characteristics are improved. In addition, structural change enables ESD discharge in four types of Zapping mode (PD, PS, ND, NS), and has superior area efficiency than unidirectional SCR. In addition, the P+ floating and N+ floating lengths corresponding to the base length of the parasitic bipolar transistor, and the distance between P+ floating and N+ floating were designated as design variables, and the high holding voltage was verified through Synopsys' TCAD Simulator.