• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.20-29
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• 1998

As the packing density of ICs in recent submicron IC design increases, interconnects gain importance. Because interconnects directly affect on two major components of circuit performance, power dissipation and operating speed, circuit engineers are concerned with the optimal design of interconnects and the aid tool to design them. When circuit models of interconnects are given (including geometry and material information), the analysis process for the given structure is not an easy task, but conversely, it is much more difficult to design an interconnect structure with given circuit characteristics. This paper focuses on the latter process that has not been foucsed on much till now due to the complexity of the problem, and prsents a design aid tool(DATOIS) to synthesize interconnects. this tool stroes the circuit performance parameters for normalized interconnect geometries, and has two oeprational modes:analysis mode and synthesis mode. In the analysis mode, circuit performance parameters are obtained by searching the internal database for a given geometry and interpolates results if necessary . In thesynthesis mode, when a given circuit performance parameter satisfies a set of geometry condition in the database, those geometry structures are printed out.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.425-429
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• 2014

This paper proposes a DC-DC Buck-Converter with DT-CMOS (Dynamic Threshold-voltage MOSFET) Switch. The proposed circuit was evaluated and compared with a CMOS switch by both the circuit and device simulations. The DT-CMOS switch reduced the output ripple and the conduction loss through a low on-resistance. Overall, the proposed circuit showed excellent performance efficiency compared to the converter with conventional CMOS switch. The proposed circuit has switching frequency of 1.2MHz, 3.3V input voltage, 2.5V output voltage, and maximum current of 100mA. In addition, this paper proposes a SCP (Short Circuit Protection) circuit to ensure reliability.

• Transactions on Electrical and Electronic Materials
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• v.15 no.3
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• pp.117-124
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• 2014

The calculation of short-circuit currents is important for power systems operation and restoration, and for determining the means to protect human lives and properties. In this paper, a part of a power system network, around the D$\breve{e}$tmarovice power station in Czech Republic, was simulated by the well known program EMTP-ATPDraw (Electromagnetic Transients Program-Alternative Transient Program), and short-circuit currents and voltages were calculated at different points in the electric network and presented as a time function by the PlotXY program. Calculations were done just for phase-to-ground, and for the three-phase short-circuit at the Kun$\check{c}$ice substation. The results were important for determining the characteristics of the equipment required to withstand or break the short-circuit current; for this reason, the calculations were repeated using earth-fault resistances only for the case of busbar KUN shown in Figs. 5 and 6.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.866-867
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• 2008

Among many tests to verify the characteristics of power system apparatus, the short circuit test is performed to verify the performance characteristics of the apparatus under the short-circuited power system. The verification of the short-circuit performance is inevitable for the reliability of power system and the safety of the operator around. The short circuit performance test requires the suitable power source and Korea Electrotechnology Research Institute has 4000 MVA, 500 MVA short circuit generators for the short circuit performance test. This paper will study on the parameters of short-circuit generator and the estimation of them.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.4
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• pp.327-334
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• 2000

In this paper, the circuit model using circuit averaging method for full bridge for full bridge converter is suggested. This model can represent the physical characteristics of converter circuits appropriately. At most of high capacity DC-DC converter application parts, full bridge converter is adapted for main circuit of power supply. Design and analysis of full bridge converter is no trouble with circuit model. The validity of circuit model is verified through computer simulation and practical welding experiment of welding machine with full bridge converted model.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.254-256
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• 2006

A Novel way to support typical Thermal Shut Down(TSD) circuit is proposed. In power ICs, on-time or on-duration is the key factor to anticipate an abrupt increase of internal temperature. Such an abrupt raise of the temperature can cause TSD circuit cannot protect on proper time due to the temperature detection delay come from the physical distance or the imperfect coupling between heat sources and detector. The proposed circuit checks the duty ratio touched their maximum or not in every cycle. Once duty ratio touches the maximum duty, new circuit generates the warning signal to the TSD circuit and lowers pre-determined temperature for shut down to compensate the detection delay. The novel circuit will be analyzed to the transistor level and checked the validity by simulation.

• Journal of Electrical Engineering and Technology
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• v.6 no.3
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• pp.408-413
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• 2011

In this paper, a real-coefficient approach to Adaptive Frequency Sampling (AFS) technique is developed for efficient equivalent circuit modeling of RF components. This proposed method is advantageous than the vector fitting technique and the conventional AFS method in terms of fewer samples leading to a lower order of a rational function on a given data and to a direct conversion to an equivalent circuit for PSPICE(Personal Simulation Program with Integrated Circuit Emphsis) simulation, respectively. To validate the proposed method, the distributed equivalent circuit of a presented multi-layered RF low-pass filter is obtained using the proposed real-coefficient AFS, and then comparisons with EM simulation and circuit simulation for the device under consideration are achieved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.410-413
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• 2001

In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont #9599, which is applied for L TCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of l0[mA]

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.365-366
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• 2006

Hydraulic circuit breaker is the most popular type of electric power circuit breaker because of its superiority of operating performance and capacity. For the improvement of hydraulic circuit breaker's operating performance, it is very important to analyze its dynamic behavior characteristics. In this study, hydraulic circuit is modeled, analyzed and experimented. As a result, the experimental data agree well with the numerical ones, and the numerical results can be applied to the design and the improvement of hydraulic electric power circuit breaker.

• Progress in Superconductivity
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• v.9 no.2
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• pp.157-161
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• 2008

Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.