• 제목/요약/키워드: capacitance density

검색결과 395건 처리시간 0.029초

Ferroelectric Properties of Seeded SBT Thin Films on the LZO/Si Structure

  • Im, Jong-Hyun;Jeon, Ho-Seung;Kim, Joo-Nam;Lee, Gwang-Geun;Park, Byung-Eun;Kim, Chul-Ju
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.128-129
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    • 2007
  • We fabricated seeded $SrBi_2Ta_2O_9$(SBT) thin films using seeding technique on the $LaZrO_x$ (LZO)/Si structure. To evaluate the ferroelectric properties of seeded SBT thin films, we investigated the crystalline phase, the surface morphology, the capacitance-voltage (C-V) curve and the current density-voltage (J-V) curve of seeded films and then compared with the physical and electrical properties of unseeded films. As the result of that, the characteristics of seeded and unseeded films have a slight difference. Therefore, the ferroelectric properties of seeded SBT thin films are not necessarily superior than unseeded films.

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AAO (Anodized Aluminium Oxide) template 제조 및 이를 이용해 제조한 탄소 및 산화 금속 나노 섬유 물질에 관한 연구 (The Study of Manufacturing the AAO Template and Fabrication of Carbon and Metal Oxide Nanofibers using AAO Template)

  • 김청;박수길
    • 한국표면공학회지
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    • 제49권4호
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    • pp.357-362
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    • 2016
  • In this study, we manufactured the anodized alumina oxide (AAO) template and fabricated the carbon nanofibers and manganese oxide nanofibers using AAO template for application to electrochemical capacitor. Pore diameters of the AAO template were increased from 50 to 90 nm by increasing the acid treatment time after two-step anodizing process. Furthermore nanofibers, which is fabricated by AAO template, showed uniform diameter and micro structure. It is suggested that the surface area is larger than commercial electrode material and it is enhancing the energy density by increasing the specific capacitance.

dual frequency ICP 에서의 frequency 조합과 capacitance 변화에 따른 $SiO_2$ 및 poly-Si 식각특성

  • 김진호;김희대;이내응;허승회;장기명;남창길;손종원
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2007년도 춘계학술발표회 초록집
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    • pp.132-133
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    • 2007
  • 2개의 주파수가 인가된 유도결합 플라즈마(ICP)를 이용하여 주파수 조합(13.56 or 27.12/2MHz)과 안테나의 캐패시턴스 변화에 따른 $SiO_2$ 와 poly-Si 의 식각특성을 연구하였다. 본 실험의 결과로, 27.12 MHz에서 plasma density가 높다는 것과 13.56 MHz에서 center high profile이 쉽게 형성됨을 알 수 있었다. $SiO_2$ 식각에서는 non-uniformity와 etch rate모두 27.12 MHz가 13.56 MHz보다 높다는 것을 알 수 있었고, poly-Si 식각에서는 non-uniformity와 etch rate모두 비슷한 경향을 나타낸다는 것을 알 수 있었다.

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터널링 자기저항 소자의 정전기 방전 시뮬레이션 (Electrostatic discharge simulation of tunneling magnetoresistance devices)

  • 박승영;최연봉;조순철
    • 한국자기학회지
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    • 제12권5호
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    • pp.168-173
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    • 2002
  • 본 연구에서는 인체모델(humman body model; HBM)을 터널링 자기저항(tunneling magneto resistance; TMR)소자에 연결하여 정전기에 대한 방전특성을 연구하였다. 이를 위해 제조된 TMR 시편을 전기적 등가회로 바꿔 HBM에 연결하여 PSPICE를 이용해 시뮬레이션 하였다. 이러한 등가회로에서 접합부분의 모델링 요소들의 값을 변화시켜 방전특성을 관찰할 수 있었다. 그 결과 시편의 저항과 정전용량 성분의 값이 다른 요소들에 비해 수배에서 수백 배까지 커서 정전기 방전(electrostatic discharge; ESD) 민감도를 좌우하는 주요한 요소임을 알 수 있었다. 여기에서 ESD현상에 대한 내구성을 향상시키기 위해서는 정전용량을 증가시키는 것 보다 접합면과 도선의 저항값을 줄이는 것이 유리하다. 그리고 직류 전압에 대해 절연층의 전위 장벽이 낮아져 많은 전류가 흐르게 되는 항복(breakdown)전압과 셀의 물리적 구조 및 성질이 변형되어 회복되지 못하는 파괴(failure)전압을 측정하여 DC 상태에서의 내구성을 연구하였다. 이 결과를 HBM 전압에 대한 파괴 전압으로 간주하여 TMR 소자가 견딜 수 있는 HBM 전압을 예측할 수 있었다.

Basic characteristics of metal-ferroelectric-insulator-semiconductor structure using a high-k PrOx insulator layer

  • Noda, Minoru;Kodama, Kazushi;Kitai, Satoshi;Takahashi, Mitsue;Kanashima, Takeshi;Okuyama, Masanori
    • E2M - 전기 전자와 첨단 소재
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    • 제16권9호
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    • pp.64.1-64
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    • 2003
  • A metal-ferroelectric [SrBi$_2$Ta$_2$O$\_$9/ (SBT)-high-k-insulator(PrOx)-semiconductor(Si) structure has been fabricated and evaluated as a key part of metal-ferroelectric-insulator-semiconductor-field-effect-transistor MFIS-FET memory, aiming to improve the memory retention characteristics by increasing the dielectric constant in the insulator layer and suppressing the depolarization field in the SBT layer. A 20-nm PrOx film grown on Si(100) showed both a high of about 12 and a low leakage current density of less than 1${\times}$ 10e-8 A/$\textrm{cm}^2$ at 105 MV/cm. A 400-nm SBT film prepared on PrOx/Si shows a preferentially oriented (105) crystalline structure, grain size of about 130 nm and subface roughness of 3.2 nm. A capacitance-voltage hysteresis is confirmed on the Pt/SBT/PrOx/Si diode with a memory window of 0.3V at a sweep voltage width of 12 V. The memory retention time was about 1 104s, comparable to the conventional Pt/SBT/SiO$\_$x/N$\_$y/(SiO$\_$N/)/Si. The gradual change of the capacitance indicates that some memory degradation mechanism is different from that in the Pt/SBT/SiON/Si structure.

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고유전율 AIN 절연층을 사용한 비휘발성 강유전체 메모리용 MFIS 구조의 제작 및 특성 (Fabrications and Properties of MFIS Structures using high Dielectric AIN Insulating Layers for Nonvolatile Ferroelectric Memory)

  • 정순원;김광희;구경완
    • 대한전자공학회논문지SD
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    • 제38권11호
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    • pp.765-770
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    • 2001
  • 고온 급속 열처리시킨 LiNbO₃/AIN/Si(100) 구조를 이용하여 MFIS 소자를 제작하고, 비휘발성 메모리 동작 가능성을 확인하였다. 고유전율 AIN 박막 위에 Pt 전극을 증착시켜 제작한 MIS 구조에서 측정한 1MHz C-V 특성곡선에서는 히스테리시스가 전혀 없고 양호한 계면특성을 보였으며, 축적 영역으로부터 산출한 비유전율 값은 약 8 이었다. Pt/LiNbO₃/AIN/Si(100) 구조에서 측정한 1MHz C-V 특성의 축적영역에서 산출한 LiNbO₃ 박막의 비유전율 값은 약 23 이었으며, ±5 V의 바이어스 범위 내에서의 메모리 윈도우는 약 1.2 V이었다. 이 MFIS 구조에서의 게이트 누설전류밀도는 ±500 kV/cm의 전계 범위 내에서 10/sup -9/ A/㎠ 범위를 유지하였다. 500 kHz의 바이폴러 펄스를 인가하면서 측정한 피로특성은 10/sup 11/ cycle 까지 초기값을 거의 유지하는 우수한 특성을 보였다.

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다공성 Co3O4/RuO2 복합체 합성 및 전기화학적 특성 (Synthesis and Electrochemical Characterization of Porous Co3O4/RuO2 Composite)

  • 임혜민;류광선
    • 한국재료학회지
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    • 제22권3호
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    • pp.118-122
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    • 2012
  • We synthesized porous $Co_3O_4/RuO_2$ composite using the soft template method. Cetyl trimethyl ammonium bromide (CTAB) was used to make micell as a cation surfactant. The precipitation of cobalt ion and ruthenium ion for making porosity in particles was induced by $OH^-$ ion. The porous $Co_3O_4/RuO_2$ composite was completely synthesiszed after anealing until $250^{\circ}C$ at $3^{\circ}C$/min. From the XRD ananysis, we were able to determine that the porous $Co_3O_4$/RuO2 composite was comprised of nanoparticles with low crystallinity. The shape or structure of the porous $Co_3O_4/RuO_2$ composite was studied by FE-SEM and FE-TEM. The size of the porous $Co_3O_4/RuO_2$ composite was 20~40 nm. From the FE-TEM, we were able to determine that porous cavities were formed in the composite particles. The electrochemical performance of the porous $Co_3O_4/RuO_2$ composite was measured by CV and charge-discharge methods. The specific capacitances, determined through cyclic voltammetry (CV) measurement, were ~51, ~47, ~42, and ~33 F/g at 5, 10, 20, and 50 mV/sec scan rates, respectively. The specific capacitance through charge-discharge measurement was ~63 F/g in the range of 0.0~1.0 V cutoff voltage and 50 mAh/g current density.

BST Thin Film Multi-Layer Capacitors

  • Choi, Woo Sung;Kang, Min-Gyu;Ju, Byeong-Kwon;Yoon, Seok-Jin;Kang, Chong-Yun
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.319-319
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    • 2013
  • Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

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Hybrid Capacitor의 전기화학적 특성 및 Hybrid Capacitor / Li-ion Battery의 펄스 방전 특성 (Electrochemical Characteristics of Hybrid Capacitor and Pulse Performance of Hybrid Capacitor / Li-ion Battery)

  • 이선영;김익준;문성인;김현수
    • 한국전기전자재료학회논문지
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    • 제18권12호
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    • pp.1133-1138
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    • 2005
  • In this study, we have prepared, as the pluse power source, a commercially supplied Li-ion battery with a capacity of 700 mAh and AC resistivity of 60 md at 1 kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected hybrid capacitor/Li-ion battery source. The nonaqueous asymmetric hybrid capacitors constituted with each stack number of pairs composed of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The 10 stacked hybrid capacitor, which was charged and discharged at a constant current at 0.25 $mA/cm^2$ between 3 and 4.3 V, has exhibited the capacitance of 108F and the lowest equivalent series resistance was 32 $m{\Omega}$ at 1 kHz. On the other hand, the enhanced run time of Li-ion battery assisted by the hybrid capacitor was obtained with increasing of current density and pulse width in Pulse mode. The best improvement, $84\;\%$ for hybrid capacitor/Li-ion battery was obtained in the condition of a 7C-rate pulse (100 msec)/0.5C-rate standby/$10\;\%$ duty cycle.

Volumetric Capacitance of In-Plane- and Out-of-Plane-Structured Multilayer Graphene Supercapacitors

  • Yoo, Jungjoon;Kim, Yongil;Lee, Chan-Woo;Yoon, Hana;Yoo, Seunghwan;Jeong, Hakgeun
    • Journal of Electrochemical Science and Technology
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    • 제8권3호
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    • pp.250-256
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    • 2017
  • A graphene electrode with a novel in-plane structure is proposed and successfully adopted for use in supercapacitor applications. The in-plane structure allows electrolyte ions to interact with all the graphene layers in the electrode, thereby maximizing the utilization of the electrochemical surface area. This novel structure contrasts with the conventional out-of-plane stacked structure of such supercapacitors. We herein compare the volumetric capacitances of in-plane- and out-of-plane-structured devices with reduced multi-layer graphene oxide films as electrodes. The in-plane-structured device exhibits a capacitance 2.5 times higher (i.e., $327F\;cm^{-3}$) than that of the out-of-plane-structured device, in addition to an energy density of $11.4mWh\;cm^{-3}$, which is higher than that of lithium-ion thin-film batteries and is the highest among in-plane-structured ultra-small graphene-based supercapacitors reported to date. Therefore, this study demonstrates the potential of in-plane-structured supercapacitors with high volumetric performances as ultra-small energy storage devices.