• Progress in Superconductivity and Cryogenics
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• v.14 no.4
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• pp.36-40
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• 2012

This paper presents an experimental and numerical study on current limiting characteristics of a fault current controller (FCC). The FCC consists of an AC/DC power converter, a superconducting coil, and a control unit. Even though some previous researches proved that the FCC could adjust the fault current level, the current limiting characteristics by the superconducting coil should be investigated for design of the coil. In this paper, four kinds of model coils were tested; 1) air core, 2) iron core without any bias, 3) reversely magnetized core (RMC) using permanent magnets, and 4) RMC using an electromagnet. Based on a comparative study, it is confirmed that a RMC by an electromagnet (EM) could increase the effective inductance of the coil. In this paper, a numerical code to simulate the HTS coil with RMC was developed. This code can be applied to design the HTS coil with active reversely magnetized bias coil.

• ETRI Journal
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• v.34 no.6
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• Korean Journal of Materials Research
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• v.12 no.6
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• pp.431-435
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• 2002

The dark current and photocurrent(PC) spectrum of Mg-doped GaN thin film were investigated with various bias voltages and temperatures. At high temperature and small bias, the dark current is dominated by holes thermally activated from an acceptor level Al located at about 0.16 eV above the valence band maximum $(E_v)$, The PC peak originates from the electron transition from deep level A2 located at about 0.34 eV above the $E_v$ to the conduction band minimum $(E_ C)$. However, at a large bias voltage, holes thermally activated from A2 to Al experience the field-in-duces tunneling to form one-dimensional defect band at Al, which determines the dark current. The PC peak associated with the transition from Al to $E_ C$ is also observed at large bias voltages owing to the extended recombination lifetime of holes by the tunneling. In the near infrared region, a strong PC peak at 1.20 eV appears due to the hole transition from deep donor/acceptor level to the valence band.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.11
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• pp.912-916
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• 2001

Fluxmeter is a measuring instrument the magnetic flux intensity by means of an integration of the voltage induced to a search coil to unit time. It also is required to a precise integrator since the voltage induced to a search coil has a differential value of the flux ${\Phi}$ to unit time. In this study, a bias current which is a main problem of the integrator in a drift troublesome depending on the temperature of a FET is investigated. We have confirmed that the temperature dependence of both the bias current of a integrator using the FET and the reversal saturated current of the minor carrier in a P-N junction of a semiconductor were the same. The property of a commercial integrator goes rapidly down with increasing temperature. The bias current of a FET is increased twice as much with 10$^{\circ}C$ increment. As a result, the low drift integrator could be developed by setting the lower temperature up with a pottier device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.11
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• pp.869-873
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• 2001

The effects of alternate bias stress on p-channel poly-Si TFT\`s has been systematically investigated. We alternately applied positive and negative bias stress on p-channel poly-Si TFT\`s, device Performance(V$\_$th/, g$\_$m/, leakage current, S-slope) are alternately appeared to be increasing and decreasing. It has been shown that device performance degrade under the negative bias stress while improve under the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ interface under alternate bias stress.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.9
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• pp.2464-2482
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• 2024

The semantic understanding of numbers requires association with context. However, powerful neural networks overfit spurious correlations between context and numbers in training corpus can lead to the occurrence of contextual bias, which may affect the network's accurate estimation of number magnitude when making inferences in real-world data. To investigate the resilience of current methodologies against contextual bias, we introduce a novel out-of-distribution (OOD) numerical question-answering (QA) dataset that features specific correlations between context and numbers in the training data, which are not present in the OOD test data. We evaluate the robustness of different numerical encoding and decoding methods when confronted with contextual bias on this dataset. Our findings indicate that encoding methods incorporating more detailed digit information exhibit greater resilience against contextual bias. Inspired by this finding, we propose a digit-aware position embedding strategy, and the experimental results demonstrate that this strategy is highly effective in improving the robustness of neural networks against contextual bias.

• Journal of Sensor Science and Technology
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• v.28 no.5
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• pp.329-333
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• 2019

Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.5
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• pp.382-385
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• 2021

Electrical poling is a crucial step to convert ferroelectrics to piezoelectrics. Nevertheless, no systematic investigation on the effect of poling has been reported. Given that the poling involves an alignment of spontaneous polarization, the condition for poling should be different when a material has an internal bias field that influences the domain stability. Here, we present the effect of poling profile on the dielectric and piezoelectric properties in Mn-doped Pb(Mg_1/3Nb_2/3)O₃-29 mol%PbTiO₃ single crystal with an internal bias field. We showed that both the dielectric permittivity and the piezoelectric coefficient were further enhanced when the poling procedure ends with a field application along the opposite direction to the internal bias field. We expect that the current finding would give a clue to understanding the true mechanism for the electrical poling.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.285-289
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• 2015

We prepared silver Schottky contacts to O-polar and nonpolar m-plane bulk ZnO wafers. Then, by considering various transport models, we performed a comparative analysis of the current transport properties of Ag/bulk ZnO Schottky diodes, which were measured at 300, 200, and 100 K. The fitting of the forward bias current-voltage (I-V) characteristics revealed that the tunneling current is dominant as the transport component in both the samples. Compared to thermionic emission (TE), a stronger contribution of tunneling current was observed at low temperature. The reverse bias I-V characteristics were well fitted with the thermionic field emission (TFE) in both the samples. The presence of acceptor-like adsorbates, such as O₂ and H₂O, modulated the surface conductive state of ZnO, thereby affecting the tunneling effect. The degree of activation/passivation of acceptor-like adsorbates might be different in both the samples owing to their different surface morphologies and surface defects (e.g., oxygen vacancies).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.9
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• pp.818-824
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• 2006

The effects of high-temperature process required to fabricate the SiC devices on the surface morphology and the electrical characteristics were investigated for 4H-SiC Schottky diodes. The 4H-SiC diodes without a graphite cap layer as a protection layer showed catastrophic increase in an excess current at a forward bias and a leakage current at a reverse bias after high-temperature annealing process. Moreover it seemed to deviate from the conventional Schottky characteristics and to operate as an ohmic contact at the low bias regime. However, the 4H-SiC diodes with the graphite cap still exhibited their good electrical characteristics in spite of a slight increase in the leakage current. Therefore, we found that the graphite cap layer serves well as the protection layer of silicon carbide surface during high-temperature annealing. Based on a closer analysis on electric characteristics, a conductive surface transfiguration layer was suspected to form on the surface of diodes without the graphite cap layer during high-temperature annealing. After removing the surface transfiguration layer using ICP-RIE, Schottky diode without the graphite cap layer and having poor electrical characteristics showed a dramatic improvement in its characteristics including the ideality factor[${\eta}$] of 1.23, the schottky barrier height[${\Phi}$] of 1.39 eV, and the leakage current of $7.75\{times}10^{-8}\;A/cm^{2}$ at the reverse bias of -10 V.