Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Effect of Alternate Bias Stress on p-channel poly-Si TFT`s

P-채널 다결정 실리콘 박막 트랜지스터의 Alternate Bias 스트레스 효과

  • 김영호 (수원대학교 전기전자공학부) ;
  • 조봉희 (수원대학교 전기전자공학부) ;
  • 강동헌 (수원대학교 전기전자공학부) ;
  • 길상근 (수원대학교 전기전자공학부) ;
  • 임석범 (수원대학교 전기전자공학부) ;
  • 임동준 (수원대학교 전기전자공학부)
  • Published : 2001.11.01
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Abstract

The effects of alternate bias stress on p-channel poly-Si TFT\`s has been systematically investigated. We alternately applied positive and negative bias stress on p-channel poly-Si TFT\`s, device Performance(V$\_$th/, g$\_$m/, leakage current, S-slope) are alternately appeared to be increasing and decreasing. It has been shown that device performance degrade under the negative bias stress while improve under the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ interface under alternate bias stress.

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References

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