• Journal of the Microelectronics and Packaging Society
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• v.15 no.1
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• pp.33-37
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• 2008

A noticeable amount of Kirkendall voids formed at the Sn-3.5Ag solder joint with electroplated Cu, and that became even more significant when an additive was added to Cu electroplating bath. With SPS, a large amount of voids formed at the $Cu/Cu_3Sn$ interface of the solder joint during thermal aging at $150^{\circ}C$. The in-situ AES analysis of fractured joints revealed S segregation on the void surface. Only Cu, Sn, and S peaks were detected at the fractured $Cu/Cu_3Sn$ interfaces, and the S peak decreased rapidly with AES depth profiling. The segregation of S at the $Cu/Cu_3Sn$ interface lowered interface energy and thereby reduced the free energy barrier for the Kirkendall void nucleation. The drop impact test revealed that the electrodeposited Cu film with SPS degraded drastically with aging time. Fracture occurred at the $Cu/Cu_3Sn$ interface where a lot of voids existed. Therefore, voids occupied at the $Cu/Cu_3Sn$ interface are shown to seriously degrade drop reliability of solder joints.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.89-100
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• 1997

This paper investigated a new type of low voltage threshold switch (LVTS). As distinguished from the many other types of electronic threshold switches, the LvTS is ; voltage controlled, occurs at low voltages ($V_{2}$ $O_{5}$lV devices. The average low threshold voltage < $V_{LVT}$>=218 mV (standard deviation =24mV~kT/q, where T=300K), and was independent of the device area (x100) and amorphous oxide occurred in an ~22.angs. thick interphase of the V/amorphous- $V_{2}$ $O_{5}$ contacts. At $V_{LVT}$ there was a transition from an initially low conductance (OFF) state into a succession of quantized states of higher conductance (ON). The OFF state was spatically homogeneous and dominated by tunneling into the interphase. The ON state conductances were consistent with the quantized conductances of ballistic transport through a one dimensional, quantum point contact. The temeprature dependence of $V_{LVT}$, and fit of the material parameters (dielectric function, barrier energy, conductivity) to the data, showed that transport in the OFF and ON states occurred in an interphase with the characteristics of, respectively, semiconducting and metallic V $O_{2}$. The experimental results suggest that the LVTS is likely to be observed in interphases produced by a critical event associated with an inelastic transfer of energy.rgy.y.rgy.

• 한국태양에너지학회:학술대회논문집
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• 2012.03a
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• pp.108-112
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• 2012

Crystalline silicon solar cell remains the major player in the photovoltaic marketplace with 90 % of the market, despite the development of a variety of thin film technologies. Silicon's excellent efficiency, stability, material abundance and low toxicity have helped to maintain its position of dominance. However, the cost of silicon photovoltaic remains a major barrier to reducing the cost of silicon photovoltaics. Using the crystalline silicon wafer with thinner thickness is the promising way for cost and material reduction in the solar cell production. However, the thinner thickness of silicon wafer is, the worse bow phenomenon is induced. The bow phenomenon is observed when two or more layers of materials of different temperature expansion coefficiencies are in contact, in this case silicon and aluminum. In this paper, the solar cells were fabricated with different thicknesses of Al layer in order to reduce the bow phenomenon. With lower paste applications, we observed that the bow could be reduced by up to 40% of the largest value with 130 micron thickness of the wafer even though the conversion efficiency decrease of 0.5 % occurred. Since the bowed wafers lead to unacceptable yield losses during the module construction, the reduction of bow is indispensable on thin crystalline silicon solar cell. In this work, we have studied on the counterbalance between the bow and conversion efficiency and also suggest the formation of enough back surface field (BSF) with thinner Al paste application.

• Journal of Sensor Science and Technology
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• v.29 no.4
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• pp.266-269
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• 2020

In this study, we investigated the effect of a sulfur passivation (S-passivation) process step on the electrical properties of surface-channel In_0.7Ga_0.3As quantum-well (QW) metal-oxide-semiconductor field-effect transistors (MOSFETs) with S/D regrowth contacts. We fabricated long-channel In_0.7Ga_0.3As QW MOSFETs with and without (NH₄)₂S treatment and then deposited 1/4 nm of Al₂O₃/HfO₂ through atomic layer deposition. The devices with S-passivation exhibited lower values of subthreshold swing (74 mV/decade) and drain-induced barrier lowering (19 mV/V) than the devices without S-passivation. A conductance method was applied, and a low value of interface trap density D_it (2.83×10¹² cm^-2eV^-1) was obtained for the devices with S-passivation. Based on these results, interface traps between InGaAs and high-κ are other defect sources that need to be considered in future studies to improve III-V microsensor sensing platforms.

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.275-277
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• 2007

유리를 기판으로 하는 superstrate pin 비정질 태양전지에서 전면투명전도막(TCO)과 p-layer의 계면이 태양전지의 효율을 내는데 가장 큰 기여를 한다. 전면투명전도막(TCO)으로 현재 일반적으로 사용되는 ZnO:Al는 $SnO_2:F$ 보다 전기,광학적으로 우수하고, 안개율(Haze)높으며, 수소 플라즈마에서의 안정성이 높은 특정을 갖고 있다. 그래서 박막 태양전지 특성향상에 매우 유리하나, 태양전지로 제조했을 때, $SnO_2:F$보다 충진율(Fill factor:F.F)과 V_{\infty}$ 가 감소한다는 단점을 가지고 있다. 본 실험실에서는 $SnO_2:F$의 F.F가 72%이 나온 반면 ZnO:Al의 F.F은 68%에 그쳤다. 이들 원인을 분석하기 위해 TCO/p-layer의 전기적 특성을 알아 본 결과, $SnO_2:F$보다 ZnO:Al의 직렬저항이 높게 측정되었다. 이러한 결과를 바탕으로 p-layer 에 R={$H_2/SiH_4$}=25로 변화, p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착, p-layer의 boron doping 농도를 증가시키는 실험을 하였다. 직렬저항이 가장 낮았던 p ${\mu$}c$-Si:H/p a-SiC:H 로 p-layer 이중 증착에서 Voc는 0.95V F.F는 70% 이상이 나왔다. 이들 각 p층의 $E_a$(Activation Energy)를 구해본 결과, ${\mu$}c$-Si:H의 Ea 가 가장 낮은 것을 관찰 할 수 있었다.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.34 no.9
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• pp.1227-1233
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• 2010

In the hot section of a gas turbine, the turbine blades were protected from high temperature by providing a thermal barrier coating (TBC) as well as by cooling air flowing through internal passages within the blades. The cooling air then passed through discrete holes on the blade surface, creating a film of cooling air that further protects the surface from the hot mainstream flow. The holes are subjected to stresses resulting from the lateral growth of thermally grown oxide, the thermal expansion misfit between the constituent layers, and the centrifugal force due to high-speed revolution; these stresses often result in cracking. In this study, the deformation and cracks occurring near a hole on a heat-resistant alloy subjected to thermo-mechanical cycling were investigated. The experiment showed that cracks formed around the hole depending on the applied stress level and the number of cycles. These results could be explained by our analytic solution.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.199-199
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• 2010

최근 평판 디스플레이 산업의 발전에 따라 능동행렬 액정 표시 소자 (AMOLED : Active Matrix Organic Liquid Crystral Display) 가 차세대 디스플레이 분야에서 각광을 받고있다. 기존의 TFT-LCD에 사용되는 a-Si:H는 균일도가 좋지만 전기적인 스트레스에 의해 쉽게 열화되고 낮은 이동도는 갖는 단점이 있으며, ELA (Eximer Laser Annealing) 결정화 poly-Si은 전기적인 특성은 좋지만 uniformity가 떨어지는 단점을 가지고 있어서 AMOLED 및 대면적 디스플레이에 적용하기 어렵다. 따라서 a-Si:H TFT보다 좋은 전기적인 특성을 보이며 ELA 결정화 poly-Si TFT보다 좋은 uniformity를 갖는 SPC (Solid Phase Crystallization) poly-Si TFT가 주목을 받고있다. 본 연구에서는 차세대 디스플레이 적용을 위해서 glass 기판위에 증착된 a-Si을 SPC 로 결정화 시킨 후 TFT를 제작하고 평가하였다. 또한 TFT 형성시에 저온공정을 실현하기 위해서 소스/드레인 영역에 실리사이드를 형성시켰다. 소자 제작시의 최고온도는 $500^{\circ}C$ 이하에서 공정을 진행하는 저온 공정을 실현하였다. Glass 기판위에 a-Si이 80 nm 증착된 기판을 퍼니스에서 24시간 동안 N2 분위기로 약 $600^{\circ}C$ 에서 결정화를 진행하였다. 노광공정을 통하여 Active 영역을 형성시키고 E-beam evaporator를 이용하여 약 70 nm 의 Pt를 증착시킨 후, 소스와 드레인 영역의 실리사이드 형성은 N2 분위기에서 $450^{\circ}C$, $500^{\circ}C$, $550^{\circ}C$에서 열처리를 통하여 형성하였다. 게이트 절연막은 스퍼터링을 이용하여 SiO2를 약 15 nm 의 두께로 증착하였다. 게이트 전극의 형성을 위하여 E-beam evaporator 을 이용하여 약 150 nm 두께의 알루미늄을 증착하고 노광공정을 통하여 게이트 영역을 형성 후 에 $450^{\circ}C$, H2/N2 분위기에서 약 30분 동안 forming gas annealing (FGA)을 실시하였다. 제작된 소자는 실리사이드 형성 온도에 따라서 각각 다른 특성을 보였으며 $450^{\circ}C$에서 실리사이드를 형성시킨 소자는 on currnet와 SS (Subthreshold Swing)이 가장 낮은것을 확인하였다. $500^{\circ}C$와 $550^{\circ}C$에서 실리사이드를 형성시킨 소자는 거의 동일한 on current와 SS값을 나타냈다. 이로써 glass 기판위의 SB-TFT 제작 시 실리사이드 형성의 최적온도는 $500^{\circ}C$로 생각되어 진다. 위의 결과를 토대로 본 연구에서는 SPC 결정화 방법을 이용하여 SB-TFT를 성공적으로 제작 및 평가하였고, 차세대 디스플레이에 적용할 경우 우수한 특성이 기대된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.188.1-188.1
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• 2014

Aluminum is widely used as a material for electrode on silicon based devices. Especially, aluminum films are used as backside and front-side electrodes in silicon quantum dot (QD) solar cells. In this point, the diffusion of aluminum is very important for the enhancement of power conversion efficiency by improvement of contact property. Aluminum was deposited on a Si (100) wafer and a Si QD layer by ion beam sputter system with a DC ion gun. The Si QD layer was fabricated by $1100^{\circ}C$ annealing of the $SiO_2/SiO_1$ multilayer film grown by ion beam sputtering deposition. Cs ion beam with a low energy and a grazing incidence angle was used in SIMS depth profiling analysis to obtain high depth resolution. Diffusion behavior of aluminum in the Al/Si and Al/Si QD interfaces was investigated by secondary ion mass spectrometry (SIMS) as a function of heat treatment temperature. It was found that aluminum is diffused into Si substrate at $450^{\circ}C$. In this presentation, the effect of heat treatment temperature and Si nitride diffusion barrier on the diffusion of Al will be discussed.

• Polymer(Korea)
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• v.38 no.2
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• pp.232-239
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• 2014

Poly(lactic acid)(PLA) nanocomposites containing various nanofillers were synthesized using the solution intercalation method. Organically modified bentonite clay (NSE), octadecylamine-graphene oxide (ODA-GO), and an NSE/ODA-GO complex were utilized as nanofillers in the fabrication of PLA hybrid films. PLA hybrid films with varying nanofiller contents in the range of 0-10 wt% were examined and compared in terms of their thermomechanical properties, morphologies, and oxygen permeabilities. Transmission electron microscopy (TEM) confirmed that most of the NSE and ODA-GO nanofillers were dispersed homogeneously throughout the PLA matrix on the nanoscale, although some agglomerate NSE/ODA-GO complex particles were also formed. Among the three nanofillers for PLA hybrid films, the NSE/ODA-GO complex showed the best improvement in film thermal stability. In contrast, NSE and ODA-GO exhibited the best improvement in tensile mechanical properties and oxygen barrier properties of the PLA hybrid films, respectively.

• Korean Journal of Materials Research
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• v.11 no.4
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• pp.329-334
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• 2001

Microstructures of barrier-type oxide layers on aluminum was studied by XRD, TEM and RBS. Fer formation of oxide layer. aluminum was anodized in a boric acid solution. The thickness of the oxide film subjected to applied voltage increased linearly at ratio of 1.54nm/V. For oxide layer anodized at 300V, amorphous structure of oxide layer was not transformed after heat treatment at 50$0^{\circ}C$ , while for oxide layers anodized at higher voltages the amorphous structure crystallized into a ${\gamma}$-alumina without any heat treatment. It was also found that the amorphous structure of oxide layer formed at 100V transformed into crystalline structure by electron irradiation. The structure was identified as ${\gamma}$-alumina.