• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.4
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• pp.52-62
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• 1996

In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analog current-mode active filters was proposed. Compared to the current-mode integrator which was proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter was designed with the proposed current-mode integrator. The designed circuits were fabricated using the ORBIT's 1.2.mu.m double-poly double-metal CMOS n-well process. The experimental resutls of the active filter designed and fabricated for this research have shown that it has the performance of 44.5MHz cutoff frequency, 3.3mW power dissipation and the third-order active filter area was 0.12mm$^{2}$.

• The Journal of the Acoustical Society of Korea
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• v.16 no.3
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• pp.106-113
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• 1997

A 3V CMOS continuous-time fully-balanced integrator for low-voltage analog-digital mixed-mode signal processing is designed in this paper. The basic architecture of the designed fully-balanced integrator is complementary circuit which is composed of NMOS and PMOS transistor. And this complementary circuit can extend transconductance of an integrator. So. the unity gain frequency, pole and zero of integrator are increased by the extended transconductance. The SPICE simulation and small signal analysis results show that the UGF, pole and zero of the integrator is increased larger than those of the compared integrtors. The three-pole active low-pass filter is designed as a application circuit of the fully-balanced integrator, using 0.83V CMOS processing parameter.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.808-815
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• 1990

This paper treats with the design method for the single loop oversampled Sigma-Delta A/D converter with one delay and the digital integrator. Such an integrator was kgenerated by means of the bilinear transform of the analog integrator. The frequency spectrums of the quantizer and the decimator output signal are evaluated by FFT respectively. With the performance evaluation system, the values of SNR are obtained versus the input sinusoidal signal amplitude, frequency, the oversampling ratio, the DC-input level, the loop gain and the limitting value of the integrator. As compared with existing results, values of SNR versus the input signal amplitude and the oversampling ratio for the suggested system are about 6dB higher then previously reported results respectively. Furthermore, this approach achieves an about 60dB input dynamic range.

• Proceedings of the KIEE Conference
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• 1988.11a
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• pp.465-468
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• 1988

A n-well CMOS Operational Transconductance Amplifier -C(OTA-C) integrator with a wide linear input range is designed. The circuit designed has superior linearity of input voltage range compared with the conventional source-coupled pair OTA. The OTA developed in this paper is versatile in application: diverse applications are in the fields of linear amplifiers, continuous-time filters, gain control circuits, and analog multipliers, etc..

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1C
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• pp.77-86
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• 2010

In this paper, we present a noncoherent IR-UWB (Impulse Radio-Ultra Wide Band) ranging system with an AFE (Analog Front End) composed of a simple integrator and an 1-bit ADC (Analog-to-Digital Converter), and define AFE characteristics affecting the ranging performance. This system is realistic and easy to implement, since the integrator simply accumulates signal energies and the simple 1-bit ADC is applied instead of the multi-bit ADCs for coherent IR-UWB systems. On the other hand, its ranging accuracy is largely affected channel environments such as noise, multipath fading and so on, since the noncoherent receiver simply squares and integrates the received signals. However, despite these practical importances, there are few conventional researches on the performance analysis according to AFE characteristics in IR-UWB ranging systems. To this end, we analyze in this paper ranging performance according to AFE characteristics for the noncoherent IR-UWB ranging system in various wireless channel environments, and through these results we also present system parameters to be considered in UWB hardware designs.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.2
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• pp.73-80
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• 2003

This Paper Proposes instantaneous following control method to control pulse modulation switching converter by using principle that reset time of integrator is inverse proportion in size of integrator input voltage. proposed control method acts of fixed frequency and control switch calculates time of become turn on and turn off using analog integrator. Duty ratio that express switching time of converter is depended on mean value of switching variable and following time consists in one cycle. Follow to do order exactly stationary state as well as transition state, and controller corrects mean value of control variable and control reference value and control as control error gets into zero. Proposed control method could experimented and know that experiment result and theory are agreeing well through this using the buck converter.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.605-615
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• 1986

The phase-locked loop(PLL) is a communication receiver which operates as a coherent detector by continuously correcting the phase error. In this paper analysis for the Phase-error behavior of analog phase-locked loop (APLL) in the presence of additive white gaussian noise has been done theoretically and experimentally. A close form solution of the first-order loop is obtained and approximate solutions are derived for the second-order loops with RC, leadlag and perfect integrator filters. The perdormance of APLL's and their characteristics are also thoroughly investigated through experiments. In order to analyze the effect of the stochastic nature on nonlinear dynamics characteristics of the second order APLL, the phase error distribution and its variance have been obtained by using the Fokker-Planck equation. Theoretical results agree closely with those of experiment.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.8-16
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for column-parallel analog-to-digital converter (ADC) array used in a low noise CMOS image sensor. The proposed modulator implements two switched capacitor integrators and a single-bit comparator within only 10-㎛ column-pitch for column-parallel ADC array. Also, peripheral circuits for driving all column modulators include a non-overlapping clock generator and a bias circuit. The proposed delta-sigma modulator has been implemented in a 110-nm CMOS process. It achieves 88.1-dB signal-to-noise-and-distortion ratio (SNDR), 88.6-dB spurious-free dynamic range (SFDR), and 14.3-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 418 for 12-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 970×10 ㎛2 and 248 ㎼, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05a
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• pp.103-105
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• 2002

Instantaneous following PWM control technique is pulsed nonlinear dynamic control method. This new control technique using analog integrator is proposed to control the duty ratio D of Cuk converter. In this control method, the duty ratio of a switch is exactly equal to or proportional to the control reference in the steady state or in a transient. Proposed control method compensates power source perturbation in one switching cycle, and the average value of the dynamic reference in one switching cycle. There is no steady state error nor dynamic error between the control reference and the average value of the switched variable. Experiments with Cuk converter have demonstrated the robustness of the control method and verified theoretical prediction. The control method is very general and applicable to all type PWM.

• Journal of Industrial Technology
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• v.16
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• pp.191-195
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• 1996

This paper deals with the tapped time delay circuit with SCF(Switched Capacitor Filters). This filter is composed of lossless discrete integrator and the SCF has 2-phase clocks. Experimental results have shown that telephone signals (0~4kHz) could be delayed in the range of sampling frequency 80kHz. But above the range, operational amplifiers and analog switchs have been difficult in the normal operating condition.