Oversampled Sigma-Delta A/D Converters Designed by Bilinear Transform

쌍선형 변환에 의한 과표본화율의 시그마-델타 A/D 변환율

This paper treats with the design method for the single loop oversampled Sigma-Delta A/D converter with one delay and the digital integrator. Such an integrator was kgenerated by means of the bilinear transform of the analog integrator. The frequency spectrums of the quantizer and the decimator output signal are evaluated by FFT respectively. With the performance evaluation system, the values of SNR are obtained versus the input sinusoidal signal amplitude, frequency, the oversampling ratio, the DC-input level, the loop gain and the limitting value of the integrator. As compared with existing results, values of SNR versus the input signal amplitude and the oversampling ratio for the suggested system are about 6dB higher then previously reported results respectively. Furthermore, this approach achieves an about 60dB input dynamic range.