• Transactions on Electrical and Electronic Materials
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• v.16 no.1
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• pp.34-36
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• 2015

Amorphous SiZnSnO(SZTO) thin film transistors(TFTs) have been fabricated by RF magnetron sputtering process, and they were annealed in air and in wet ambient. The electrical performance and the structure were analyzed by I-V measurement, XPS, AFM, and XRD. The results showed improvement in device performance by wet annealing process compared to air annealing treatment, because free electron was shown to be increased due to reaction of oxygen and hydrogen generating oxygen vacancy. This is understood by the generation of free electrons. We expect the wet annealing process to be a promising candidate to contributing to high electrical performance of oxide thin film transistors for backplane device applications.

• Transactions on Electrical and Electronic Materials
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• v.16 no.2
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• pp.62-64
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• 2015

We have investigated zinc tin oxide (ZTO) thin films under various silicon ratios. ZTO TFTs were fabricated by solution processing with the bottom gate structure. Furthermore, annealing process was performed at different temperatures in various annealing conditions, such as air, vacuum and wet ambient. Completed fabrication of ZTO TFT, and the performance of TFT has been compared depending on the annealing conditions by measuring the transfer curve. In addition, structure in ZTO thin films has been investigated by X-ray diffraction spectroscopy (XRD) and Scanning electron microscope (SEM). It is confirmed that the electrical performance of ZTO TFTs are improved by adopting optimized annealing conditions. Optimized annealing condition has been found for obtaining high mobility.

• Composites Research
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• v.26 no.2
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• pp.123-128
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• 2013

The PVDF (polyvinylidene fluoride) fibers were prepared using the wet spinning processing. To improve ${\beta}$-phase crystalline which closely related piezoelectric property PVDF wet spun fibers conducted post treatment. Post treatment is consisted of heat stretching and annealing process. The heat stretching and annealing conditions were controlled by changing temperature between glass transition temperature and melting temperature. From these experimental data, the resulting crystal structure of the ${\beta}$-phase crystalline was confirmed by FT-IR and XRD experiments. From these analysis results, optimum stretching and annealing conditions of the wet spun PVDF fibers were founded to increase high ${\beta}$-phase crystalline. Furthermore results showed that thermal processing had a direct effect on modifying the crystalline microstructure and also confirmed that heat stretching and annealing could increase the degree of crystallinity and ${\beta}$-phase crystalline. Finally, piezoelectric constant ($d_{11}$) of the post heat treated PVDF fibers reinforced composite were measured to investigate the feasibility for the sensing materials.

• Journal of the Korean institute of surface engineering
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• v.48 no.1
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• pp.7-10
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• 2015

Recently, oxide TFTs has attracted a lot of interests due to their outstanding properties such as excellent environmental stability, high mobility, wide-band gap energy and high transparency, and investigated through the method using vacuum system and wet solution. In the case of the method using wet solution, process is very simple, however, annealing process should be included. In this study, to overcome the problem of annealing process, atmospheric pressure plasma was used for annealing, and the electrical characteristics such as on/off ration and mobility of device were investigated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.2
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• pp.152-155
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• 2011

Even though nano-scale materials were very advantageous for various applications, there are still problems to be solved such as the stabilization of surface state and realization of low contact resistances between a semiconducting nanowire and electrodes in nano-electronics. It is well known that the effects of contacts barrier between nano-channel and metal electrodes were dominant in carrier transportation in individual nano-electronics. In this report, it was investigated the electrical properties of GaN nanorod devices after chemical etching and rapid thermal annealing for making good contacts. After KOH wet-etching of the contact area the devices showed better electrical performance compared with non-treated GaN individual devices but still didn't have linear voltage-current characteristics. The shape of voltage-current properties of GaN devices were improved remarkably after rapid thermal annealing as showing Ohmic behaviors with further bigger conductivities. Even though chemical etching of the nanorod surfaces could cause scattering of carriers, in here it was shown that the most important and dominant factor in carrier transport of nano-electronics was realization of low contact barrier between nano-channel and metal electrodes surely.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.2
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• pp.173-179
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• 1999

The effect of the surface activation treatment on the crystallization of the amorphous silicon film was investigated. The amorphous silicon film was deposited on the silica substrate with LPCVD technique. Wet blasting with silica slurry or exposure with Nd:YAG laser beam was applied on the amorphous silicon film before annealing for the crystallization. For the analysis of the crystallinity, XRD, Raman, and SEM were employed. In this investigation, the prior surface activation treatment like silica wet blasting or Nd:YAG laser beam exposure before annealing for the crystallization were found to be effective in the enhancement of the crystallization. It is believed that these treatment lower the activation energy required for the crystallization of the amorphous silicon film.

• Proceedings of the Materials Research Society of Korea Conference
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• 1993.05a
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• pp.34-34
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• 1993

• Journal of the Korean institute of surface engineering
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• v.35 no.6
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• pp.377-382
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• 2002

We investigated the appropriate wet cleaning process for Co-Ti-Si compounds formed on top of cobalt disilicide made from Co/Ti deposition and two rapid thermal annealing (RTA). We employed three wet cleaning processes, WP1 ($H_2$SO$_4$ etchant), WP2 ($NH_4$OH etchant), and WP3 which execute sequentially WP1 and WP2 after the first RTA. All samples were cleaned with BOE etchant after the second RTA. We characterized the sheet resistance with process steps by a four-point probe, the microstructure evolution by a cross detail sectional transmission electron microscope, a Auger depth profiler, and a X-ray diffractometer (XRD). We confirmed WP3 wet cleaning process were the most suitable to remove CoTiSi layer selectively.

• Journal of the Korean institute of surface engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.56-59
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• 2000

In this paper, we have made a comparison between secondary ion mass spectroscopy(SIMS) data by the 5kcV-15keV boron implantation and computer simulation results. In order to make electrical activation of implanted carriers, thermal annealing are carried out by RTP method for 30s at 1000$^{\circ}C$ Two dimensional doping concentration distribution from different mask dimensions under inert gas annealing, dry-, and wet-oxidation condition were calculated and simulated with microtec simulator.