• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.436-442
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• 2016

An electroencephalogram (EEG)-connectome processor to monitor and diagnose mental health is proposed. From 19-channel EEG signals, the proposed processor determines whether the mental state is healthy or unhealthy by extracting significant features from EEG signals and classifying them. Connectome approach is adopted for the best diagnosis accuracy, and synchronization likelihood (SL) is chosen as the connectome feature. Before computing SL, reconstruction optimizer (ReOpt) block compensates some parameters, resulting in improved accuracy. During SL calculation, a sparse matrix inscription (SMI) scheme is proposed to reduce the memory size to 1/24. From the calculated SL information, a small world feature extractor (SWFE) reduces the memory size to 1/29. Finally, using SLs or small word features, radial basis function (RBF) kernel-based support vector machine (SVM) diagnoses user's mental health condition. For RBF kernels, look-up-tables (LUTs) are used to replace the floating-point operations, decreasing the required operation by 54%. Consequently, The EEG-connectome processor improves the diagnosis accuracy from 89% to 95% in Alzheimer's disease case. The proposed processor occupies $3.8mm^2$ and consumes 1.71 mW with $0.18{\mu}m$ CMOS technology.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.1383-1386
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• 1997

Discrete cosine transform(DCT) is the most popular block transform coding in lossy mode. DCT is close to statistically optimal transform-the Karhunen Loeve transform. In this paper, a module for DCT encoder is made with TMS320C80 based on JPEG and MPEG, which are intermational standards for image compression. the DCT encoder consists of three parts-a transformer, a vector quantizer and an entropy encoder.

• 전자공학회논문지A
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• 제32A권9호
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• pp.135-141
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• 1995

An optical digital parallel processor using Self-Pumped Phase Conjugate Mirror and liquid crystal spatial light modulator is presented and experimentally implemented. To use self-pumped PCM as memory, the mechanism for phase conjugation in two coupled interaction regions with the photorefractive crystal BaTiO$_{3}$ is investigated, especially the temporal behavior and effects of incident beam position. The optical design and implementation of matrix-vector multiplication using LCSLM and PCM memory is presented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1991년도 하계학술대회 논문집
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• pp.627-630
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• 1991

This study is about vector controlled inverter for high quality elevator drive that is to improve the settling accuracy of elevator car and passenger's comfort in commercial buildings. In this study, an instantaneous space vector control type inverter was used to reduce the torque ripple ant to improve the velocity follow-up. This method calculates Instantaneous actual output torque and flux of induction motor by voltage and current, then compares them with a reference values by a speed regulator. The outputs of comparators select a switching mode, for an optimal voltage vector. Also, this study used IGBT (Insulated Gate Bipolar-Transistor), a high speed switching element, to reduce sound noise level, and DSP (Digital Signal Processor) was used to improve the reliability of the control circuit by fully digitalization.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.807-811
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• 2003

In this paper, the speed control system of induction motor was proposed using vector control algorithm and space voltage vector PWM method to improve the dynamic performance of Induction motor. The control system is composed of the PI controller for speed control and the current controller using space voltage vector PWM technique. The high-speed calculation and processing for vector control is carried out by TMS320C31 digital signal processor and IGBT module. The proposed scheme is verified through digital simulations and experiments for 3.7[kw] induction motor and shows good dynamic performance.

• 대한전기학회논문지:시스템및제어부문D
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• 제53권8호
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• pp.578-584
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• 2004

The CSVM(Current Support Vector Machine) that is a digital architecture performing all phases of recognition process including kernel computing, learning, and recall of SVM(Support Vector Machine) on a chip is proposed. Concurrent operation by parallel architecture of elements generates high speed and throughput. The classification problems of bio data having high dimension are solved fast and easily using the CSVM. Quadratic programming in original SVM learning algorithm is not suitable for hardware implementation, due to its complexity and large memory consumption. Hardware-friendly SVM learning algorithms, kernel adatron and kernel perceptron, are embedded on a chip. Experiments on fixed-point algorithm having quantization error are performed and their results are compared with floating-point algorithm. CSVM implemented on FPGA chip generates fast and accurate results on high dimensional cancer data.

• 방송공학회논문지
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• 제9권4호
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• pp.434-445
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• 2004

대부분의 비디오 부호화기에서 움직임 예측은 부호화된 영상의 화질을 결정하는 중요한 기술이다. 그러나 일반적으로 많이 사용되는 전역 탐색 방법은 많은 연산량이 필요하다는 단점이 있다. 이를 개선하기 위한 기존의 고속 움직임 예측 방법들은 연산량을 줄이기 위한 복잡한 프로그램 구조를 가지고 있어서 DSP와 같은 전용 프로세서에 구현하기가 부적합하다. 본 논문에서는 미디어 프로세서에 적합한 효율적인 움직임 탐색 방법을 제안한다. 주위 블록 간의 공간적 상관도를 이용해 예측 움직임 벡터를 구할 수 있으며, 또한 탐색 영역을 축소시킴으로써 전체 연산량을 줄일 수 있다. 제안된 방법의 효율을 확인하기 위하여 MPEG-4 SP@L3(Simple Profile at Level 3) 부호화기를 TM1300에서 구현하였다. 제안한 방법은 TM1300 프로세서 상에서 전역 탐색 방법에 근접한 화질을 유지하며 기존 고속 움직임 예측 방법보다 향상된 성능을 보였다.

• 한국통신학회논문지
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• 제31권7C호
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• pp.706-712
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• 2006

본 논문에서는 OFDM(Orthogonal Frequency Division Multiplexing) 시스템의 반송파 주파수 동기화부 구현을 위하여 Compact CORDIC 처리기를 제안한다. Compact CORDIC 처리기는 반송파 주파수 옵셋 추정 및 보상시에 요구되는 OFDM 시스템의 독특한 특성을 이용하여 제안되었으며, Compact CORDIC 전처리부와 Compact CORDIC 처리부로 구성된다. Compact CORDIC 전처리부에서는 신호의 정규화를 효율적으로 수행하며, Compact CORDIC 처리부에서는 Vector 모드 CORDIC 과 Rotation 모드 CORDIC 연산을 효율적으로 결합하여 동시에 처리하여 반송파 주파수 동기화를 수행한다. FPGA 구현을 통하여 제안된 Compact CORDIC 처리기가 기존 CORDIC 방법보다 성능이 우수하며 구현 복잡도가 크게 감소함을 확인한다.

• 전자공학회논문지B
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• 제30B권10호
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• pp.69-76
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• 1993

In this paper we propose a design of a digital neuron processor using the residue number system for efficient matrix.vector multiplication involved in neural processing. Since the residue number system needs no carry propagation for modulus operations, the neuron processor can perform multiplication considerably fast. We also propose a high speed algorithm for computing the sigmoid function using the specially designed look-up table. Our method can be implemented area-effectively using the current technology of digital VLSI and siumlation results positively demonstrate the feasibility of our method. The proposed method would expected to adopt for application field of digital neural network, because it could be realized to currently developed digital VLSI Technology.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2002년도 학술대회지
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• pp.67-70
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• 2002

In the present study a pre/post-processor program has been developed to be used with a general CFD code. This program is capable of performing the basic functions of the pre/post-processing, which include mesh generation and post processing plots. Also through perspective projection, this program can be used to check the quality of generated mesh by moving around inside the mesh. The smoke visualization can be also performed with the present program to visualize the smoke behavior in the case of fire simulation. The examples of the program execution are given in paper.