• Title/Summary/Keyword: V-line

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Development of the Transmission Line Design System for Overseas Projects (해외사업용 송전선로 설계시스템 개발)

  • Min, Byeong-Wook;Kim, Jong-Hwa;Choi, Seok-June;Bang, Hang-Kwon;Choi, Han-Yeol
    • Proceedings of the KIEE Conference
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    • 2006.11a
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    • pp.129-131
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    • 2006
  • KEPCO constructed the first 765kV 2 circuit transmission line in the world with its home grown technologies. Through this 765kV transmission system project, KEPCO accumulated experience and technologies related to the 765 kV power system. Based on the successful completion of the 765kV transmission project, KEPCO is conducting overseas business by using its abundant experience and know-how. In particular, KEPCO developed the training course for power system, called the ATT (Advanced Transmission Technology) training courses for overseas business, especially for developing countries. Therefore, KEPCO developed the "Transmission line design system for overseas projects". This system supports the calculation of wind pressure load, tower design, wire selection, insulation design, etc. by applying the meteorological data of foreign countries and design standards. And this system is applied to the training program so that the trainees can design the optimal transmission line for their own countries.

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A Single-Stage Power Factor Correction Converter far $90-265V_{rms}$ Line Applications ($90-265V_{rms}$ 입력범위를 갖는 단일전력단 역률개선 컨버터)

  • 이준영;박희정;구관본;윤명중
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.5
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    • pp.508-514
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    • 2000
  • A single-stage power factor correction AC/DC converter with a simple link voltage suppressing circuit (LVSC) for the universal line application is proposed. Using this simple circuit, a low link voltage can be realized without deadbands at line zero-crossings. The proposed converter is analyzed and a prototype converter with 5V, 12A output is implemented to verify the performance. The experimental results show that the link voltage stress and efficiency are about 447V and 81%, respectively.

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VCO fabrication using Microstrip Line operating at the UHF frequency band (UHF대역에서 동작하는 마이크로스트립라인을 이용한 VCO 제작)

  • Rhie, Dong Hee;Jung, Jin-Hwee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.05c
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    • pp.55-58
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    • 2001
  • In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T=1.5V$, while the simulated value was 1.0GHz at $V_T=1.5V$. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

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VCO fabrication using Microstrip Line operating at the UHF frequency band (UHF대역에서 동작하는 마이크로스트립라인을 이용한 VCO 제작)

  • Rhie, Dong-Hee;Jung, Jin-Hwee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.05c
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    • pp.153-156
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    • 2001
  • In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T$=1.5V, while the simulated value was 1.0GHz at $V_T$=1.5V. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

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Reconstruction of a Traumatic Cleft Earlobe Using a Combination of the Inverted V-Shaped Excision Technique and Vertical Mattress Suture Method

  • Park, June Kyu;Kim, Kyung Sik;Kim, Seung Hong;Choi, Jun;Yang, Jeong Yeol
    • Archives of Craniofacial Surgery
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    • v.18 no.4
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    • pp.277-281
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    • 2017
  • Traumatic cleft earlobes are a common problem encountered by plastic and reconstructive surgeons. Various techniques have been reported for the repair of traumatic cleft earlobes. Usually, the techniques of split earlobe repair are divided into two categories, namely straight- and broken-line repairs. Straight-line repair is simple and easy, but scar contracture frequently results in notching of the inferior border of the lobule. It can be avoided by the broken-line repair such as Z-plasty, L-plasty, or a V-shaped flap. Between April 2016 and February 2017, six patients who presented with traumatic cleft earlobe underwent surgical correction using a combination of the inverted V-shaped excision technique and vertical mattress suture method. All the patients were female and had a unilateral complete cleft earlobe. No postoperative notching of the inferior border the lobule occurred during 6-16 months of follow-up. Without the use of a broken-line repair, both the patients and the operators attained aesthetically satisfactory results. Therefore, the combination of the inverted V-shaped excision technique and vertical mattress suture method is considered useful in the treatment of traumatic cleft earlobes.

Analysis of Simulation Results for Secondary Arc in 765kV single transmission line (765kV 1회선 선로의 2차아크 모의결과 분석)

  • Ahn, S.P.;Kim, C.H.;Park, N.O.;Ju, H.J.;Shim, E.B.
    • Proceedings of the KIEE Conference
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    • 2004.11b
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    • pp.36-38
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    • 2004
  • In many countries, including Korea, in order to transmit the more electric power, the higher transmission line voltage is inevitable. So, a rapid reclosing scheme is important for UHV transmission lines to ensure requirements for high reliability of main lines. But, because of the high voltage and long span of UHV lines, the secondary arc current flows across the fault point even after the interruption of the fault current. i.e. A critical aspect of reclosing operation is the extinction of the secondary arc since it must extinguish before successful reclosure can occur. In Korea transmission lines, it is scheduled to energize 765kV single transmission line(79km) between Sin-Ansung S/S and Sin-Gapyeong S/S at June 2006. Therefore this paper analyzes characteristics of the secondary arc extinction on 765kV single transmission line using EMTP. Simulation results shows that the average value of the secondary arc is $30A_{rms}$ and the auto-extinction time of it is longer at closer point to Sin-Gapyeong S/S.

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A Study on Multi-Phase Flashover in 765kV Transmission Line using EMTP (EMTP를 이용한 765kV 송전선로 다상 섬락에 관한 연구)

  • Ka, B.H.;Min, S.W.
    • Proceedings of the KIEE Conference
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    • 1998.07e
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    • pp.1586-1588
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    • 1998
  • To use the EMTP, in this paper, a arcing horn is simulated by non-linear resistor and inductor element using TACS, a tower by distributed parameter model, and lines as K. C. Lee model. Changing lightning current characteristics, lightning position, and tower footing resistor value, we analysis multi-phase flashover characteristics in 765 kV transmission line.

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The Design of Lumped Constant Circuit for the Simulation of A Real 22.9 kV-y Distribution Line (22.9 kV-y 실긍장 배전선로 모의를 위한 집중정수회로의 설계)

  • Yun, Chul-Ho;Jeong, Yeong-Ho;Han, Yong-Huei
    • Proceedings of the KIEE Conference
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    • 1999.07c
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    • pp.1186-1188
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    • 1999
  • When we perform the test related to the power distribution system such as artificial fault test, protective coordination test, distribution automation test in short length test line, Lumped Constant Circuit, a kind of variable impedance, should be attached to the test line in order to make it equivalent to a real line in length electrically. In this paper we designed the positive sequence and zero sequence Lumped Constant Circuit with optimized inductor and resister for the modification of long, 16km, distribution line, when they are attached to the short, 4km, distribution test line.

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A Study on the Visual Evaluation and Interpretation about Clothing Form and the Surface Image of Detail (의복형태와 디테일에 의한 표면이미지의 시각적 평가)

  • 이경희;이경희
    • Journal of the Korean Society of Clothing and Textiles
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    • v.18 no.5
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    • pp.646-660
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    • 1994
  • The purpose of this study was to investigate the difference of the visual evaluation about Clothing form and the surface image of detail. This study consists of pre-experiment for selecting the method of expression among detail which shows difference of the image and main experiment for identifying the clothing image as clothing form and the suface image of detial. Main experiment is made of factorial design for three variables-clothing form (H-line, A-line, V-line, X-line), detail (frill, tape), direction (width, length). Questionaire consists of 24 semantic differential scale expressing clothing form and detail. The subjects were 100 female students majoring in clothing and textile.7he data were analyzed by Frequencey, Factor analysis, Anova, scheffe's test and MCA method. The major findings were; 1) The image of clothing form and the surface image of detail were composed of 5 factors; attractiveness, prettiness, attention, modern, young. 2) For the visual evaluation of clothing form as the surface image of detail, there were significant differences in prettiness and attention factors. For the pretty and attentive image, we should express by the image of frill. 3) For the visual evaluation of the image of detail as clothing forms variation, there were significant difference in prettiness by A-line and X-line. 4) For the effect of clothing form and the surface image of detail, main effect was significant in attractiveness, prettiness, attention, modern factor. For the pretty image of clothing, it will be expressed by the image of frill and A-line, X-line. For the attentive image of clothing, it will be expressed by the image of frill and V-line. For the modern image of clothing, it will be expressed by the image of tape and V-line.

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Deign of Small-Area Differential Paired eFuse OTP Memory for Power ICs (Power IC용 저면적 Differential Paired eFuse OTP 메모리 설계)

  • Park, Heon;Lee, Seung-Hoon;Jin, Kyo-Hong;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.8 no.2
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    • pp.107-115
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    • 2015
  • In this paper, a small-area 32-bit differential paired eFuse OTP memory for power ICs is designed. In case of smaller number of rows than that of columns for the OTP memory cell array, a scheme for the cell array reducing the number of SL driver circuits requiring their larger layout areas by routing the SL (source line) lines supplying programming currents for eFuse links in the row direction instead of the column direction as well as a core circuit is proposed. In addition, to solve a failure of being blown for non-blown eFuse links by the electro-migration phenomenon, a regulated voltage of V2V ($=2V{\pm}0.2V$) is used to a RWL (read word line) driver circuit and a BL (bit line) pull-up driver circuit. The layout size of the designed 32-bit eFuse OTP memory is $228.525{\mu}m{\times}105.435{\mu}m$, which is confirmed to be 20.7% smaller than that of the counterpart using the conventional cell array routing, namely $197.485{\mu}m{\times}153.715{\mu}m$.