• Title/Summary/Keyword: U-Gate

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The effect of forging process conditions of semi-solid aluminum material on mechanical properties (반용융 알루미늄재료의 단조공정조건이 기계적 성질에 미치는 영향)

  • Gang, Chung-Gil;Gang, Dong-U
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.21 no.9
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    • pp.1400-1413
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    • 1997
  • Semi-solid forging(SSF) process of A356 aluminium alloy has been studied to assess the effect of process variables on the component integrity. Semi-solid material(SSM) was fabricated by mechanical and electro-magnetic stirring process. The fabricated SSM by using mechanical stirring process has been carried out on cooling rate of 0.022.deg. C/sec 0.0094.deg. C/sec and stirring speed n=600, 1000 rpm, respectively. The fabricated SSM by using electro-magnetic stirring process is supplied by Pechiney. The holding time and temperature in the semi-solid state before forging also affects the globular microstructure of alloy. Therefore, the influence of these two parameters is discussed in terms of the microstructure of alloy. The SSF process has been conducted with three different die temperatures($T_{die}$=250.deg. C, 300.deg. C, 350.deg. C) and two kinds of gate types(straight gate and orifice gate). This paper is to investigate the influence of gate shapes of die on filling phenomena in SSF process more deeply. The mechanical properties of forged components were also investigated for variation of process conditions such as die temperature, gate shape and SSM.

Hysteresis Phenomenon of Hydrogenated Amorphous Silicon Thin Film Transistors for an Active Matrix Organic Light Emitting Diode (능동형 유기 발광 다이오드(AMOLED)에서 발생하는 수소화된 비정질 실리콘 박막 트랜지스터(Hydrogenated Amorphous Silicon Thin Film Transistor)의 이력 (Hysteresis) 현상)

  • Choi, Sung-Hwan;Lee, Jae-Hoon;Shin, Kwang-Sub;Park, Joong-Hyun;Shin, Hee-Sun;Han, Min-Koo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.1
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    • pp.112-116
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    • 2007
  • We have investigated the hysteresis phenomenon of a hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and analyzed the effect of hysteresis phenomenon when a-Si:H TFT is a pixel element of active matrix organic light emitting diode (AMOLED). When a-Si:H TFT is addressed to different starting gate voltages, such as 10V and 5V, the measured transfer characteristics with 1uA at $V_{DS}$ = 10V shows that the gate voltage shift of 0.15V is occurred due to the different quantities of trapped charge. When the step gate-voltage in the transfer curve is decreased from 0.5V to 0.05V, the gate-voltage shift is decreased from 0.78V to 0.39V due to the change of charge do-trapping rate. The measured OLED current in the widely used 2-TFT pixel show that a gate-voltage of TFT in the previous frame can influence OLED current in the present frame by 35% due to the change of interface trap density induced by different starting gate voltages.

The research of u-disaster prevention City service and technology (u-방재 City 서비스 및 기술에 관한 연구)

  • Lee, Bum-Gyo;Kim, Hyun-Joo;Han, Jin-Woo
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.277-280
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    • 2008
  • Starting from 2005, as the new city paradigm, the term 'u-City' was created in Korea. U-City service, as defined in "u-City law", is a service that connects and intermediates among government, traffic, welfare, environment, disaster mitigation, etc., and their data based on ubiquitous city technology and infrastructure. According to the survey executed by local governments, the improvements in the standard of living of citizens have in turn increased the needs for anti-mitigation services. Such trend is bolstered with the recent disasters such as the conflagration of Korean Soong-rae Gate and the devastating earthquake of Sichuan province. This article describes a concept of the u-City disaster prevention service and looks into the activities and planning of u-City disaster prevention service of local governments. This paper also briefly looks into the law and policies to derive the needs of u-City disaster prevention service as well as the current technologies and u-City disaster prevention services of local governments. Ultimately, this paper offers the strategic direction of developing u-Disaster Prevention City.

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Size Scaling에 따른 Gate-All-Around Silicon Nanowire MOSFET의 특성 연구

  • Lee, Dae-Han;Jeong, U-Jin
    • Proceeding of EDISON Challenge
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    • 2014.03a
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    • pp.434-438
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    • 2014
  • CMOS의 최종형태로써 Gate-All-Around(GAA) Silicon Nanowire(NW)가 각광받고 있다. 이 논문에서 NW FET(Field Effect Transistor)의 채널 길이와 NW의 폭과 같은 size에 따른 특성변화를 실제 실험 data와 NW FET 특성분석 simulation을 이용해서 비교해보았다. MOSFET(Metal Oxide Semiconductor Field Effect Transistor)의 소형화에 따른 쇼트 채널 효과(short channel effect)에 의한 threshold voltage($V_{th}$), Drain Induced Barrier Lowering(DIBL), subthreshold swing(SS) 또한 비교하였다. 이에 더하여, 기존의 상용툴로 NW를 해석한 시뮬레이션 결과와도 비교해봄으로써 NW의 size scaling에 대한 EDISON NW 해석 simulation의 정확도를 파악해보았다.

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MOSFET 구조내 $HfO_2$게이트절연막의 Nanoindentation을 통한 Nano-scale의 기계적 특성 연구

  • Kim, Ju-Yeong;Kim, Su-In;Lee, Gyu-Yeong;Lee, Chang-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.317-318
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    • 2012
  • 현재의 반도체 산업에서 Hafnium oxide와 Hafnium silicates같은 high-k 물질은 CMOS gate와 DRAM capacitor dielectrics로 사용하기 위한 대표적인 물질에 속한다. MOSFET (metal oxide semiconductor field effect transistor)구조에서 gate length는 16 nm 이하로 계속 미세화가 연구 중이고, 또한 gate는 기존구조에서 Multi-gate구조로 다변화가 일어나고 있다. 이를 통해 게이트 절연막은 그 구조와 활용범위가 다양해지게 될 것이다. 동시에 leakage current와 dielectric break-down을 감소시키는 연구가 중요해지고 있다. 그러나 나노 영역에서의 기계적 특성에 대한 연구는 전무한 상태이다. 따라서 복잡한 회로 공정, 다양한 Multi-gate 구조, 신뢰도의 향상을 위해서는 유전박막 물질자체와 계면에서의 물리적, 기계적인 특징의 측정이 상당히 중요해지고 있다. 이에 본 연구는 Nano-indenter의 통해 경도(Hardness)와 탄성계수(Elastic modulus) 등의 측정을 통하여 시료 표면의 나노영역에서의 기계적 특성을 연구하고자 하였다. $HfO_2$게이트 절연막은 rf magnetron sputter를 이용해 Si (silicon) (100)기판위에 박막형태로 증착하였고, 이후 furnace에서 질소분위기로 온도(400, 450, $500^{\circ}C$)를 달리하여 20분 열처리를 하였다. 또한 Weibull distribution을 이용해 박막의 characteristic value를 계산하였으며, 실험결과 열처리 온도가 $400^{\circ}C$에서 $500^{\circ}C$로 증가함에 따라 경도와 탄성계수는 7.4 GPa에서 10.65 GPa으로 120.25 GPa에서 137.95 GPa으로 각각 증가하였다. 이는 재료적 측면으로 재료의 구조적 우수성이 증가된 것으로 판단된다.

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Electrical characterization of 4H-SiC MOSFET with aluminum gate according to design parameters (Aluminium Gate를 적용한 4H-SiC MOSFET의 Design parameter에 따른 전기적 특성 분석)

  • Seung-Hwan Baek;Jeong-Min Lee;U-yeol Seo;Yong-Seo Koo
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.630-635
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    • 2023
  • SiC is replacing the position of silicon in the power semiconductor field due to its superior resistance to adverse conditions such as high temperature and high voltage compared to silicon, which occupies the majority of existing industrial fields. In this paper, the gate of 4H-SiC Planar MOSFET, one of the power semiconductor devices, was formed with aluminium to make the contrast and parameter values consistent with polycrystalline Si gate, and the threshold voltage, breakdown voltage, and IV characteristics were studied by varying the channel doping concentration of SiC MOSFET.