• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2088-2090
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• 1998

A low-cost electronic starter is developed to decrease ignition failure significantly through successive starting trial and to prevent overheating at the end of fluorescent lamp life. Moreover, it has an additional feature of being capable of ignition at the recovered lamp voltage without any circuit correction. The developed electronic starter is consisted of four parts - a half wave rectifier circuit, a timer circuit, a switching circuit and a protection circuit. The protection circuit made up of a transistor and capacitors utilizing capacitive characteristics, carries out successive starting trial and end-of-life protection. Lamp ignition is completed within 0.5 seconds with taking advantage of a high preheating current from the half-wave rectifier circuit. Nevertheless, its performance is proved to be very excellent through a standard switching endurance test.

• Journal of Power Electronics
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• 제19권2호
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• pp.413-430
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• 2019

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

• Nuclear Engineering and Technology
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• 제54권2호
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• pp.501-506
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• 2022

Long turn-off time limits high frequency operation of Bipolar Junction Transistors (BJTs). Turn-off time decreases with increases in the recombination rate of minority carriers at switching transients. Fast neutron irradiation on a Si BJT incurs lattice damages owing to the displacement of silicon atoms. The lattice damages increase the recombination rate of injected holes with electrons, and decrease the hole lifetime in the base region of pnp Si BJT. Fast neutrons generated from a beryllium target with 30 MeV protons by an MC-50 cyclotron were irradiated onto pnp Si BJTs in experiment. The experimental results show that the turn-off time, including the storage time and fall time, decreases with increases in fast neutron fluence. Additionally, it is confirmed that the base current increases, and the collector current and base-to-collector current amplification ratio decrease due to fast neutron irradiation.

• 대한전자공학회논문지
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• 제9권3호
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• pp.17-21
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• 1972

현재 사용되고 있는 Dial Keysender에는 계전기형과 기계적구동형의 2종류가 있다. 그러나 이들은 제작비가 모두 고가이다. 본논문에는 제작비가 낮고, 소형인트란지스터스위칭회로를 이용한 전자식 Dial Keysender를 시작하고 기 성능을 조사하였다.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
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• pp.310-313
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• 2005

In this paper, four quadrant CBPS(Compact Bipolar Power Supply) which development and study using universal PWM controller. The CBPS has 24V DC-link voltage, +/-5A output current, 50kHz switching frequency and 30Hz full load bandwidth using FET device. Proposed system has two independent PWM controllers for each full-bridge switch leg drive and PI control loops for current regulations. It is shown experimental results that good step response of the current output.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.57-58
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• 2006

As the power density and switching frequency increase, thermal analysis of power electronics system becomes imperative. The analysis provides valuable information on the semiconductor rating, long-term reliability. In this paper, thermal distribution of the Non Punchthrough(NPT) Insulated Gate Bipolar Transistor has been studied. For analysis of thermal distribution, we obtained results by using finite element simulator, Ansys and thermal distributions form experiments.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.1160-1162
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• 2003

This paper presents ZVZCS(Zero-Voltage and Zero-Current Switching) Dual TTFC(Two-Transistor Forward Converter) without primary freewheeling diodes. The principle of operation, feature and design considerations are illustrated and verified through the ecperiment with a 1.8kW 55kHz MOSFET based experimental circuit.

• 디지털콘텐츠학회 논문지
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• 제18권6호
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• pp.1193-1198
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• 2017

본 논문에서 개발된 IGBT 구조는 DC 송배전을 위한 고전력 스위치 반도체로서 사용되며, 빠른 스위칭 속도 및 개선된 항복전압 특성을 확보하여, 향후 신재생 장거리 DC 송전을 위한 중요한 전자 소자로서 이용될 것이 기대되고 있다. 새로운 타입의 차세대 전력 반도체로서, 스위칭 속도를 향상시키면서 동시에 항복 전압의 특성을 개선시켜, 전력 손실 특성을 줄이도록 설계되었고, 높은 전류 밀도의 장점을 동시에 획득 가능하다. 이러한 개선된 특성은 Planar IGBT의 N-drift 영역에 $SiO_2$를 추가로 도입함으로서 얻어지며, Sentaurus TCAD 시뮬레이션 툴을 사용하여, 비교 분석하였다.

• ETRI Journal
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• 제39권1호
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• pp.62-68
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• 2017

In this paper, we present the design and characterization analysis of a cascode GaN field-effect transistor (FET) for switching power conversion systems. To enable normally-off operation, a cascode GaN FET employs a low breakdown voltage (BV) enhancement-mode Si metal-oxide-semiconductor FET and a high-BV depletion-mode (D-mode) GaN FET. This paper demonstrates a normally-on D-mode GaN FET with high power density and high switching frequency, and presents a theoretical analysis of a hybrid cascode GaN FET design. A TO-254 packaged FET provides a drain current of 6.04 A at a drain voltage of 2 V, a BV of 520 V at a drain leakage current of $250{\mu}A$, and an on-resistance of $331m{\Omega}$. Finally, a boost converter is used to evaluate the performance of the cascode GaN FET in power conversion applications.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.385-385
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• 2012

A two terminal N+/P/N+ junction device to replace the conventional selective transistor was studied as a bilateral switching device for spin transfer torque (STT) MRAM based on 3D device simulation. An N+/P/N+ junction structure with $30{\times}30nm$ area requires bi-directional current flow enough to write a data by a drain induced barrier lowering (DIBL) under a reverse bias at N+/P (or P/N+ junction), and high current on/off ratio of 106. The SiGe materials are widely used in hetero-junction bipolar transistors, bipolar compensation metal-oxide semiconductors (BiCMOS) since the band gap of SiGe materials can be controlled by changing the fraction and the strain epilayers, and the drift mobility is increased with the increasing Ge content. In this work, N+/P/N+ SiGe material based junction provides that drive current is increased from 40 to $130{\mu}A$ by increased Ge content from 10~80%. When Ge content is about 20%, the drive current density of SiGe device substantially increased to 2~3 times better than Si-based junction device in case of 28 nm P length, which is sufficient current to operation of STT-MRAM.