• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.440-440
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• 2009

Semiconductor nanowires offer exciting possibilities as components of solar cells and have already found applications as active elements in organic, dye-sensitized, quantum-dot sensitized, liquid-junction, and inorganic solid-state devices. Among many semiconductors, silicon is by far the dominant material used for worldwide photovoltaic energy conversion and solar cell manufacture. For silicon wire to be used for solar device, well aligned wire arrays need to be fabricated vertically or horizontally. Macroscopic silicon wire arrays suitable for photovoltaic applications have been commonly grown by the vapor-liquid-solid (VLS) process using metal catalysts such as Au, Ni, Pt, Cu. In the case, the impurity issues inside wire originated from metal catalyst are inevitable, leading to lowering the efficiency of solar cell. To escape from the problem, the wires of purity of wafer are the best for high efficiency of photovoltaic device. The fabrication of wire arrays by the electrochemical etching of silicon wafer with photolithography can solve the contamination of metal catalyst. In this presentation, we introduce silicon wire arrays by electrochemical etching method and then fabrication methods of radial p-n junction wire array solar cell and the various merits compared with conventional silicon solar cells.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.245-248
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• 2011

Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

• Korean Journal of Materials Research
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• v.21 no.12
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• pp.666-672
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• 2011

The a-Si:H/c-Si hetero-junction (HJ) solar cells have a variety of advantages in efficiency and fabrication processes. It has already demonstrated about 23% in R&D scale and more than 20% in commercial production. In order to further reduce the fabrication cost of HJ solar cells, fabrication processes should be simplified more than conventional methods which accompany separate processes of front and rear sides of the cells. In this study, we propose a simultaneous deposition of intrinsic thin a-Si:H layers on both sides of a wafer by dual hot wire CVD (HWVCD). In this system, wafers are located between tantalum wires, and a-Si:H layers are simultaneously deposited on both sides of the wafer. By using this scheme, we can reduce the process steps and time and improve the efficiency of HJ solar cells by removing surface contamination of the wafers. We achieved about 16% efficiency in HJ solar cells incorporating intrinsic a-Si:H buffers by dual HWCVD and p/n layers by PECVD.

• Journal of the Semiconductor & Display Technology
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• v.19 no.2
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• pp.55-59
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• 2020

Copper Oxide (CuO) films were deposited on the n-type silicon wafer by rf magnetron sputtering for heterojunction solar cells. And then the samples were treated as a function of the annealing temperature (300-600℃) in a vacuum. Their electrical, optical and structural properties of the fabricated heterojunction solar cells were then investigated and the power conversion efficiencies (PCE) of the fabricated p-type copper oxide/n-type Si heterojunction cells were measured using solar simulator. After being treated at temperature of 500℃, the solar cells with CuO film have PCE of 0.43%, Current density of 5.37mA/㎠, Fill Factor of 39.82%.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.61.2-61.2
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• 2010

Ag thick-film has usually been used for the front electrode of Si solar cells with the outstanding electrical properties. Ag paste consists of Ag powers, vehicles, frits and additives. Ag paste has broadly been screen-printed on the front side of Si wafer with the merits of low cost and simplicity. The optimal contact formation between Ag electrodes and Si wafer in the front electrode during a fast firing has been considered as the key factor for high efficiency. Although the content of frit in Ag pastes is less than 5wt%, it can profoundly influence the contact formation between Ag and Si under the fast firing. In this study, the effects of lead-free frits on the contacts between Ag and Si were studied with the thermal properties and compositions of various frits. Our experimental results showed that the electrical properties of cells were related to the interface structures between Ag and Si. It was found that current path of electrons from Si to Ag would be possible through the tunneling mechanism assisted by tens of nano-Ag recrystals on $n^+$ emitter as well as Ag recrystals penetrated into $n^+$ emitter layers. These preliminary studies will be helpful for designing the proper frits for the Ag pastes with considering the properties of various Si wafers.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.143-146
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• 2009

One of the most important issues of crystalline silicon solar cell is minimizing reflectance at the surface. Laser texturing is an isotropic process that will sculpt the surface of a silicon wafer, regardless of its crystallographic orientation. We investigated surface texturing process using Nd-YAG laser ($\lambda$=1064 nm) on multi-crystalline silicon wafer. Removal of slag formed after the laser process was performed using acid solution (HF : $HNO_3$ : $CH_3COOH$ : DI water). The reflectance and carrier lifetime of the samples were measured and analyzed using UV-Vis spectrophotometer and carrier lifetime tester. It was found that the minimum reflectance of the samples was 16.39% and maximum carrier life time was $21.8\;{\mu}s$.

• Journal of the Korean Vacuum Society
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• v.19 no.5
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• pp.391-396
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• 2010

The pn junction for solar cell was prepared on p-type Si wafer by the furnace using the $POCl_3$ and oxygen mixed precursor to research the characteristic of interface at pn junction. The sheet resistance was decreased in accordance with the increasing the diffusion process time for n-type doping on p-type Si wafer. The electron affinity at the interface in the pn junction was decreased with increasing the amount of n-type doping and the sheet resistance also decreased. Consequently, the drift current due to the generation of EHP increased because of low potential barrier. The efficiency and fill factor were increased at the solar cell with increasing the diffusion process time.

• Journal of the Korean institute of surface engineering
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• v.40 no.3
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• pp.138-143
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• 2007

The effects of texturing and anti-reflection coating on the reflection properties of multi-crystalline silicon solar cell have been investigated. The chemical solutions of alkaline and acidic etching solutions were used for texturing at the surface of multi-crystalline Si wafer. Experiments were performed with various temperature and time conditions in order to determine the optimized etching condition. Alkaline etching solution was found inadequate to the texturing of multi-crystalline Si due to its high reflectance of about 25%. The reflectance of Si wafer texturing with acidic etching solution showed a very low reflectance about 10%, which was attributed to the formation of homogeneous. Also, deposition of ITO anti-reflection coating reduced the reflectance of multi-crystalline si etched with acidic solution($HF+HNO_3$) to 2.6%.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.1
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• pp.321-326
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• 2021

This paper presents a technique to minimize damaged wafers during loading. A thin wafer used in solar cells and semiconductors can be damaged easily. This makes it difficult to separate the wafer due to surface tension between the loaded wafers. A technique for minimizing damaged wafers is to supply compressed air to the wafer and simultaneously apply a small horizontal movement mechanism. The main experimental factors used in this study were the supply speed of wafers, the nozzle pressure of the compressed air, and the suction time of a vacuum head. A higher supply speed of the wafer under the same nozzle pressure and lower nozzle pressure under the same supply speed resulted in a higher failure rate. Furthermore, the damage rate, according to the wafer supply speed, was unaffected by the suction time to grip a wafer. The optimal experiment conditions within the experimental range of this study are the wafer supply speed of 600 ea/hr, nozzle air pressure of 0.55 MPa, and suction time of 0.9 sec at the vacuum head. In addition, the technology improved by the repeatability performance tests can minimize the damaged wafer rate.

• Korean Journal of Materials Research
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• v.22 no.8
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• pp.390-396
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• 2012

Ag pastes added to Bi-oxide frits have been applied to the electrode material of Si solar cells. It has been reported that frits induce contacts between the Ag electrodes and the Si wafer after firing. During firing, the control of interfaces among Ag, the glass layer, and Si is one of the key factors for improving cell performance. Specifically, the thermo-physical properties of frits considerably influence Ag-Si contact. Therefore, the thermal properties of frits should be carefully controlled to enhance the efficiency of cells. In this study, the interface structures among Ag electrodes, glass layers, and recrystallites on an $n^+$ emitter were carefully analyzed with the thermal properties of lead-free frits. First, a cross-section of the area between the Ag electrodes and the Si wafer was studied in order to understand the interface structures in light of the thermal properties of the frits. The depth and area of the pits formed in the Si wafer were quantitatively calculated with the thermal properties of frits. The area of the glass layers between the Ag electrodes and Si, and the distribution of recrystallites on the $n^+$ emitter, were measured from a macroscopic point of view with the characteristics of the frits. Our studies suggest that the thermophysical properties should be controlled for the optimal performance of Si solar cells; our studies also show why cell performance deteriorated due to the high viscosity of frits in Ag pastes.