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Ryu Jin-Hwa;Kim Chang-Seok;Jeong Myung-Yung
- Journal of the Korean Society for Precision Engineering
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- v.23 no.7 s.184
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- pp.138-145
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- 2006
A nanopatterning technique was proposed and demonstrated for low cost and mass productive process using the scanning probe lithography (SPL) and soft lithography. The nanometer scale structure is fabricated by the localized generation of oxide patterning on the H-passivated (100) silicon wafer, and soft lithography was performed to replicate of nanometer scale structures. Both height and width of the silicon oxidation is linear with the applied voltagein SPL, but the growth of width is more sensitive than that of height. The structure below 100 nm was fabricated using HF treatment. To overcome the structure height limitation, aqueous KOH orientation-dependent etching was performed on the H-passivated (100) silicon wafer. Soft lithography is also performed for the master replication process. Elastomeric stamp is fabricated by the replica molding technique with ultrasonic vibration. We showed that the elastomeric stamp with the depth of 60 nm and the width of 428 nm was acquired using the original master by SPL process.
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Yang K.Y.;Hong S.H.;Lee H.
- Proceedings of the Korean Society of Precision Engineering Conference
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- 2005.06a
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- pp.676-679
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- 2005
Nano imprint Lithography (NIL) is regarded as one of the next-generation lithography technologies with EUV lithography, immersion lithography, Laser interference lithography. Because a Si wafer stamp and a quartz stamp, used to imprinting usually are very expensive and easily broken, it is suggested that master stamp is duplicated by PDMS and the PDMS stamp uses to imprint .For using the PDMS stamp, a thermally curable monomer resin was used for the imprinting process to lower pressure and temperature. As a result, NIL patterns were successfully fabricated.
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Kim, Kyung Ho;Choi, Kyun;Han, Yoonsoo
- Journal of the Korean Institute of Electrical and Electronic Material Engineers
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- v.27 no.12
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- pp.871-876
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- 2014
Efficiency of crystalline Si solar cell can be maximized as minimizing optical loss through antireflection texturing with inverted pyramids. Even if cost-competitive, soft lithography can be employed instead of photolithography for the purpose, some limitations still remain to apply the soft lithography directly to as-received solar grade wafer with a bunch of micro trenches on surface. Therefore, it is needed to develop a low-cost, effective planarization process and evaluate its output to be applicable to patterning process with PDMS stamp. In this study new surface planarization process is proposed and the change of micro scale trenches on the surface as a function of etching time is observed. Also, the effect of trenches on pattern quality by soft lithography is investigated using FEM structural analysis. In conclusion it is clear that the geometry and shape of trenches would be basic considerations for soft lithography application to low quality wafer.
https://doi.org/10.4313/JKEM.2014.27.12.871 인용 PDF KSCI

장원석;문준혁;양승만
- Proceedings of the Korean Society of Precision Engineering Conference
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- 2004.10a
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- pp.123-126
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- 2004
We have demonstrated the fabrication of patterned 3D photonic crystals by holographic lithography in conjunction with soft lithography. Holographic lithography created 3D ordered macroporous structures and soft lithography made tailored defects. Because the hard baked photoresist pattern possessed high resistance against the uncured photoresist solution and the refractive index did not change appreciably by hard baking, a crosslinked photoresist was used as a relief pattern for the holographic fabrication of patterned 3D photonic crystals. More complicated defect geometries might be easily obtained with more complicated patterns on PDMS stamps. Moreover, the present results might be used as templates for 3D PCs of highindex defects that can be exploited as optical waveguides and optical circuits.
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