• ETRI Journal
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• v.34 no.6
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• pp.950-953
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• 2012

Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.1
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• pp.53-59
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• 2003

Using Platinum-silicide (PtSi) formed between silicon substrate and carbon film, we have improved the field emission of electrons from carbon films. Pt films were deposited on n-Si(100) substrates at room temperature by DC sputter technique. After deposition, these PtSi thin films were annealed at 400 ~ $600^{\circ}C$ in a vacuum chamber, and the carbon films were deposited on those Pt/Si substrates by laser ablation at room temperature. The field emission property of C/Pt/Si system is found to be better than that of C/Si system and it is showed that property was improved with increasing annealing temperature. The reasons why the field emission from carbon film was improved can be considered as follows, (1)the resistance of carbon films was decreased due to graphitization, (2)electric field concentration effectively occurred because the surface morphology of carbon film deposited on Pt/si substrates with rough surface, (3)it is showed that annealing induced reaction between Pt film and Si substrate, as a consequence that the interfacial resistance between Pt film and Si substrate was decreased.

• Korean Journal of Materials Research
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• v.15 no.4
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• pp.246-251
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• 2005

Plasma enhanced chemical vapor deposition(PE-CVD) method has an advantage in synthesizing carbon nanotubes(CNTs) at lower temperature compared with thermal enhanced chemical vapor deposition(TE-CVD) method. In this study, CNTs was prepared by using PE-CVD method. The growth rate of CNT was faster more than 100 times on using Invar alloy than iron as catalyst. It was found that chrome silicide was formed at the interface between chrome layer and silicon substrate which should be considered in designing process. Nanoparticles of Invar catalyst were found oxidized on their surfaces with a depth of 10 m. Microstructure was analyzed by scanning electron microscopy, transmission electron microscopy, scanning transmission electron microscopy, and energy dispersive x-ray spectrometry. Based on the result of analysis, growth mechanism at an initial stage was suggested.

• Journal of Korea Multimedia Society
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• v.3 no.5
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• pp.535-541
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• 2000

In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Journal of the Korean Ceramic Society
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• v.13 no.3
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• pp.55-62
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• 1976

순수한 닉켈과 금 박막을 (III)규소 단 결정위에 진공 증착시켰다. Ni/Au/Si나 Au/Ni/Si시료를 진공중에서 약 55$0^{\circ}C$로 가열하였을 때 육방정 혹은 변형된 육방정의 미소 결정들이 규소 기질위에 형성되었다. 이들 미소 결정들의 형성과정 및 조성은 X-선 회절법, scanning electron microscopy 및 scanning Auger microprobe 법을 사용하여 결정하였다. 이들 미소 결정은 NiSi2임이 확인되었다. Ni/Au/Si 시료에서는 Au-Si 공융점(37$0^{\circ}C$) 이상으로 온도가 증가됨에 따라 닉켈과 규소가 Au-Si 공융체 속으로 이동한 후 반응하여 NiSi2를 형성하였다. Au/Ni/Si 시료에 있어서의 Au-Si 공융체 형성은 닉켈 박막에 있는 바늘구멍형의 표면 결함과 관련 지을 수 있겠다. 금이 닉켈 박막의 grain boundary를 통하여 Ni/Si 계면으로 확산되어 그 계면을 습윤시킨 다음 Au-Si 공융체를 형성하였다. 이런 Au-Si 공용체는 닉켈과 규소 원자에 대한 높은 확산 매질로서 작용하여 NiSi2 형성을 촉진시켰다. 표면에 평행한 (III)규소면 위의 NiSi2 미소 결정은 유사한 육방정으로 나타났으며, 경사진 미소결정은 부등변 사변형과 유사하였다. Auger 스펙트럼 및 Ni, Au 및 Si에 대한 내층조성(indepth Composition Profiles)은 NiSi2 미소 결정이 Au-Si 공융체의 matrix에 미소 부분으로 나타났음을 보여주었다.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.835-838
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• 1992

The $TiN/TiSi_2$ bilayer has been studied for contact barrier layer at ULSI recently. The $TiN/TiSi_2$ bilayer was formed by RTA in $NH_3$ ambient simultaneously after the Ti film was deposited on silicon substrate. In this paper, properties of $TiN/TiSi_2$ bilayer was evaluated according to $BF_2$ dopant concentration and dopant redistribution in $TiN/TiSi_2$ bilayer was also analyzed. In this experiment, the composition and structure of $TiN/TiSi_2$ bilayer were constant even though dopant concentration increased but silicide growth rate decreased. Boron atoms were redistributed within TiN film and at $TiSi_2Si$ interface during the bilayer formation.

• Korean Journal of Materials Research
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• v.10 no.1
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• pp.29-33
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• 2000

The amorphous tungsten nitrides, WNx, film could be fabricated by reactive sputtering process. The nitrogen concentration for the amorphization ranges from 10 at% to 40at%. The amorphous $W_{67}N_{33}$ film was crystallized into low resistivity $\alpha$-tungsten phase with equiaxed grains and excess nitrogen after the rapid thermal annealing for 1min at 1273K, which was similar to the resistivity of the sputtered pure tungsten film. The excess nitrogen was depleted from $\alpha$-tungsten crystals and then segregated at $\alpha$-tungsten/poly-Si interface. The segregated nitrogen has favored the formation of the homogeneous diffusion barrier layer comprised of silicon nitride, $Si_3N_4$, nano-crystals, which undertaken the inhibition of the high resistivity tungsten silicide reaction.

• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.389-392
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• 1999

We employed cobalt-disilicide for high-speed logic devices. We prepared stable and low resistant $CoSi_2$ through typical fabrication process including wet cleaning and rapid thermal process (RTP). We sputtered 15nm thick cobalt on the wafer and performed RTP annealing 2 times to obtain 60nm thick $CoSi_2$. We observed spherical shape voids with diameter of 40nm in the surface and inside $CoSi_2$ layers. The voids resulted in taking over abnormal junction leakage current and contact resistance values. We report that the voids in $CoSi_2$ layers are resulted from surface pits during the ion implantation previous to deposit cobalt layer. Silicide reaction rate around pits was enhanced due to Gibbs-Thompson effects and the volume expansion of the silicidation of the flat active regime trapped dimples. We confirmed that keeping the buffer oxide layer during ion implantation and annealing the silicon surface after ion implantation were required to prevent void defects in CoSi$_2$ layers.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.55-60
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• 2012

In order to develop electroless-plated Nickel Phosphate (Ni-P) as a contact material for high efficient low-cost silicon solar cells, we evaluated the effect of ambient thermal annealing on the degradation behavior of interfacial adhesion energy between electroless-plated Ni-P and silicon solar cell wafers by applying 4-point bending test method. Measured interfacial adhesion energies decreased from 14.83 to 10.83 J/$m^2$ after annealing at 300 and $600^{\circ}C$, respectively. The X-ray photoelectron spectroscopy analysis suggested that the bonding interface was degraded by environmental residual oxygen, in which the oxidation inhibit the stable formation of Ni silicide phase between electroless-plated Ni-P and silicon interface.

• Korean Journal of Materials Research
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• v.3 no.2
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• pp.158-165
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• 1993

Abstract To investigate the effect of underlying Si on the thermal stability of the TiS$i_2$ film, TiS$i_2$ films obtained by the solid-state reaction of the Ti film on as-deposited or on heat-treated poly-silicon and amorphous-silicon were annealed at 90$0^{\circ}C$ for various times. The poly-Si film was evaluated by XRD, SEM and TEM. The thermal stability of the TiS$i_2$ film was evaluated by measuring the sheet resistance and microstructural evolution during furnace annealing. Agglomeration of the TiSi, film occurred more on amorphous-Si than on poly-Si. The thermal stability of the TiS$i_2$ film was improved by annealing poly-Si. The Si layer crystallized from amorphous-Si has an equiaxed structure with the (111) preferred orientation whereas for as-deposited poly-Si has a columnar structure with the (110) orientation. Better thermal stability of the TiS$i_2$ film can be obtained by the higher surface energy of underlying poly-Si.