• 정보학연구
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• 제7권2호
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• pp.69-76
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• 2004

본 논문은 여러 가지 환경조건하(염무, 안개, 비)에서 오손된 실키콘애자의 누설전류파형과 파형의 스펙트럼 분석 결과를 나타내었다. 200ms동안 누설전류의 크기가 더욱 커지면 커질수록, 60Hz에서의 스펙트럼의 크기도 커짐을 알 수 있었다. 만일 오손된 애자들이 고밀도의 염무에 접촉되면 낮은 스펙트럼을 갖은 누설전류파형이 계측되었고, 간헐적으로 높은 파형이 계측되었다. 누설전류자료 분석의 경우, 전기적인 활동은 염무 측정시 애자표면에 누적된 오손물질로 인한 일시적인 아크거동으로 특성지어진다. 이것은 애자표면을 따라 흐르는 누설전류에 대한 경로를 제공하게 된 것이다. 그것은 특별한 애자의 퍼포먼스 측정을 평가하기위하여 오손누적의 지표를 갖은 것으로서 중요한 것이다. 만일 표면 저항의 떨어짐이 크게 되면, 그때의 누설전류는 전력품질이 저하시킨 섬락을 중단시키는 공급된 전류이 점차로 증가되어진다.

• 한국전기전자재료학회논문지
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• 제28권11호
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• pp.698-703
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• 2015

In this study, we fabricated the dual gate (DG) ion-sensitive field-effect-transistor (ISFET) with flexible polyimide (PI) extended gate (EG). The DG ISFETs significantly enhanced the sensitivity of pH in electrolytes from 60 mV/pH to 1152.17 mV/pH and effectively improved the drift and hysteresis phenomenon. This is attributed to the capacitive coupling effect between top gate and bottom gate insulators of the channel in silicon-on-transistor (SOI) metal-oxide-semiconductor (MOS) FETs. Accordingly, it is expected that the PI-EG based DG-ISFETs is promising technology for high-performance flexible biosensor applications.

• ETRI Journal
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• 제17권4호
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• pp.1-12
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• 1996

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

• 센서학회지
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• 제3권2호
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• pp.74-80
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• 1994

Silicon direct bonding 기술은 잔류 응력이 없고, 안정한 특성을 가진 센서의 제작과 silicon-on-insulator 소자의 제조에 널리 이용되고 있다. SDB의 공정 절차는 크게 실리콘 웨이퍼의 수산화 공정 과정과 wet oxidation fumace에서 고온의 열처리 공정 과정을 거치게 된다. 수산화 공정을 행한 후, Fourier transformation-infrared spectroscopy를 사용하여 실리콘 웨이퍼 표면을 분석하여 보면, 실리콘 웨이퍼의 표면에서는 수산화기가 생성됨을 알 수 있다. 실험 결과, $H_{2}O_{2}\;:\; H_{2}SO_{4}$ 용액을 사용한 친수성 용액 처리의 경우에 있어서는 수산화기가 3474 $cm^{-1}$ 주위의 넓은 영역에서 관찰되었다. 그러나, diluted HF 용액의 경우에 있어서는 수산화기가 관찰되지 않았다. 접합된 실리콘웨이퍼를 tetramethylammonium hydroxide 식각 용액을 사용하여 식각 공정을 수행하였다. 식각 공정은 자동 식각 중지가 수행되었으며, 식각된 표면은 평탄하고 균일하였다. 그러므로, 이러한 SDB 기술은 우수한 특성을 가진 압력, 유속, 가속도 센서 등과 같은 센서의 제작 및 센서 응용 분야에 이용될 수 있을 것이다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.951-952
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• 2009

The long way toward new silicon technology, processed at very low temperature on any substrate, is described. The technology is based on CMIS (Complementary Metal Insulator Semiconductor) structure that shown its efficiency with known CMOS electronics. Present performance of this new technology is discussed through electrical parameters and reliability of transistors.

• 전기전자학회논문지
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• 제20권3호
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• pp.279-284
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• 2016

This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm. This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm saturated output power with a 16 % maximum Power Added Efficiency (PAE). A bond wire fine tuning technology enables the amplifier a 23.67 dBm saturated output power with a 20.4 % maximum PAE. The die area is $1.9mm{\times}0.6mm$.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.692-696
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• 2005

In an attempt to fabricate all inclusive display systems we are presenting a study on several elements that would be used as building blocks for all-on-board integrated applications on stainless steel foils. These systems would include in the same substrate all or many of the components needed to drive a flat panel OLED display. We are reporting results on both digital and analog circuits on stainless steel foils. Shift registers running at speeds greater than 1.0MHz are shown as well as oscillators operating at over 40MHz. Pixel circuits for driving organic light emitting diodes are presented. The device technology of choice is that based on poly-silicon TFT technology as it has the potential of producing circuits with good performance and considerable cost savings over the established processes on quartz or glass substrates (amorphous Silicon a-Si:H or silicon on Insulator SOI).

• 전자통신동향분석
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• 제33권6호
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• pp.1-11
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• 2018

Several industrial applications such as space exploration, aerospace, automotive, the downhole oil and gas industry, and geothermal power plants require specific electronic systems under extremely high temperatures. For the majority of such applications, silicon-based technologies (bulk silicon, silicon-on-insulator) are limited by their maximum operating temperature. Silicon carbide (SiC) has been recognized as one of the prime candidates for providing the desired semiconductor in extremely high-temperature applications. In addition, it has become particularly interesting owing to a Si-compatible process technology for dedicated devices and integrated circuits. This paper briefly introduces a variety of SiC-based integrated circuits for use under extremely high temperatures and covers the technology trend of SiC CMOS devices and processes including the useful implementation of SiC ICs.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.830-833
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• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• 센서학회지
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• 제19권2호
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• pp.137-141
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• 2010

In this paper, we fabricated silicon piezoresistive pressure sensor with dry etching technology which used Deep-RIE and etching delay technology which used SOI(silicon-on-insulator) wafer. We improved pressure sensor offset and its temperature dependence by removing oxidation layer of SOI wafer which was used for dry etching delay layer. Sensitivity of the fabricated pressure sensor was about 0.56 mV/V${\cdot}$kPa at 10 kPa full-scale, and nonlinearity of the fabricated pressure sensor was less than 2 %F.S. The zero off-set change rate was less than 0.6 %F.S.