• Journal of the Semiconductor & Display Technology
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• v.10 no.2
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• pp.73-81
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• 2011

We manufactured the inkjet printing system for the application into the nano Ag finger line interconnection process in Si solar cells. The home-made inkjet printer consists of motion part for XY motion stage with optical table, head part, power and control part in the rack box with pump, and ink supply part for the connection of pump-tube-sub ink tanknozzle. The ink jet printing system has been used to conduct the interconnection process of finger lines on Si solar cell. The nano ink includes the 50 nm-diameter. Ag nano particles and the viscosity is 14.4 cP at $22^{\circ}C$. After processing of inkjet printing on the finger lines of Si solar cell, the nano particles were measured by scanning electron microscope. After the heat treatment at $850^{\circ}C$, the finger lines showed the smooth surface morphology without micropores.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2003.12a
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• pp.105-108
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• 2003

본 논문은 파이렉스 #7740 유리박막을 이용한 MEMS용 MLCA와 Si기판의 양극접합 특성에 관한 것이다. 최적의 RF 마그네트론 스퍼터링 조건(Ar 100 %, input power $1W/\textrm{cm}^2$)하에서 MLCA 기판위에 파이렉스 #7740 유리의 특성을 갖는 박막을 증착한 후 600 V, $400^{\circ}C$에서 1시간동안 양극접합했다. 그 다음에 Si 다이어프램을 제조한 후, MLCA/Si 접합계면과 MLCA 구동을 통한 Si 다이어프램 변위특성을 분석 및 평가하였다. 다이어프램 형상에 따라 정밀한 변위 제어가 가능했으며 0.05-0.08 %FS의 우수한 선형성을 나타내었다. 또한, 측정동안 접합계면 균열이나 계면분리가 일어나지 않았다. 따라서, MLCA/Si기판 양극접합기술은 고성능 압전 MEMS 소자 제작공정에 유용하게 사용가능할 것이다.

• Journal of the Semiconductor & Display Technology
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• v.6 no.3
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• pp.41-45
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• 2007

The (SrCa)$TiO_3$(SCT) thin films were deposited on Pt-coated electrode(Pt/TiN/$SiO_2$/Si) using RF sputtering method according to the deposition condition. The crystallinity of SCT thin films were increased with increase of deposition temperature in the temperature range of $100{\sim}500[^{\circ}C]$. The optimum conditions of RF power and Ar/$O_2$ ratio were 140[W] and 80/20, respectively. Deposition rate of SCT thin films was about $18.75[{\AA}/min]$ at the optimum condition. The composition of SCT thin films deposited on Si substrate is close to stoichiometry (1.081 in A/B ratio). The maximum dielectric constant of SCT thin film was obtained by annealing at $600[^{\circ}C]$.

• Journal of IKEEE
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• v.26 no.4
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• pp.671-680
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• 2022

In this paper, A 200kW traction motor driver that covers most of the traction motor specification of commercial electric vehicles (EV) is developed. In order to achieve high efficiency and high power density, a next-generation power semiconductors (Silicon carbide, SiC) are applied instead of power semiconductor(IGBT), which is Si based. Through hardware analysis for optimal use of SiC, expected efficiency and heat dissipation characteristics are obtained. A vector control algorithm for an IPMSM (Interior permanent magnet synchronous motor), which is mostly used in EV(Electric vehicle) traction motor, is implemented using DSP (Digital signal processor). In this paper, a prototype traction motor driver based SiC for EV is designed and manufactured, and its performance is verified through experiments.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.09a
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• pp.89-92
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• 2005

The AIN/AI thin films were prepared at various conditions, such as $N_2$ gas flow rate [$N_2(N_2+Ar)$] from 0.6 to 0.9, a substrate temperature ranging from room temperature to $300^{\circ}C$ and working pressure 1mTorr. We estimated crystallographic characteristics and c-axis preferred orientations of AIN/AI thin films as function of AI electrode surface roughness. The optimal processing conditions for AI electrode were found at substrate temperature of $300^{\circ}C$ sputtering power of 100W and a working pressure of 2mTorr. In these conditions, we obtained the c-axis preferred orientation of $AIN/AI/SiO_2/Si$ thin film about 4 degree.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.6
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• pp.890-898
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• 2001

4H-SiC(silicon carbide) MESFET large signal model was studied using modified Materka-Kacprzak large signal MESFET model. 4H-SiC MESFET device simulation have been conducted by Silvaco\`s 2D device simulator, ATLAS. The result is modeled using modified Materka large signal model. simulation and modeling results are -8 V pinch off voltage, under V$\_$GS/=0 V, V$\_$DS/=25 V conditions, I$\_$DSS/=270 mA/mm, G$\_$m/=52.8 ms/mm were obtained. Through the power simulation 2 GHz, at the bias of V$\_$GS/-4 V md V$\_$DS/=25 V, 10 dB Gain, 34 dBm (1dB compression point)output porter, 7.6 W/mm power density, 37% PAE(power added efficiency) were obtained.7.6 W/mm power density, 37% PAE(power added efficiency) were obtained.d.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.4
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• pp.271-274
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• 2013

Power Metal Oxide Semiconductor Field Effect Transistor's (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an "ideal switch". The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was $3{\mu}m$ and P base dose was $1e15cm^2$. Also the numerical multiple $2.52cm^2$ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from $1,150^{\circ}C$ to $1,200^{\circ}C$. And then $1,150^{\circ}C$ diffusion time was best condition for break down voltage.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• Journal of IKEEE
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• v.22 no.4
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• pp.1202-1205
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• 2018

In this paper, we proposed ggNMOS based on 4H-SiC material and analyzed its electrical characteristics. 4H-SiC is a wide band-gap meterial, which is superior in area contrast and high voltage characteristics to Si material, and is attracting attention in the power semiconductor field. The proposed device has high robustness and strong snapback characteristics. The process consisted of SiC process and electrical characteristics were analyzed by TLP measurement equipment.

• Journal of the Semiconductor & Display Technology
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• v.8 no.3
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• pp.13-17
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• 2009

we have studied characterization of microbolometer based on the co-sputtered silicon-antimony ($Si_{1-x}Sb_x$) thin film for infrared microbolometer. We have investigated the resistivity and the temperature coefficient of resistance (TCR) with annealing. We deposited the films using co-sputtering method at $200^{\circ}C$ in the Ar environment. The Sb concentration has been adjusted by applying variable DC power from Sb targets. TCR of deposited $Si_{1-x}Sb_x$ films have been measured the range of -2.3~-2.8%/K. The resistivity of the film is low but TCR is higher than the other bolometer materials. Resistivity of the films has not been affected hugely according to the low annealing temperature however the resistivity has been dramatically decreased over $250^{\circ}C$. It is caused of a phase change due to the rearrangement of Si and Sb atoms during crystallization process of the films.