• Korean Journal of Materials Research
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• v.14 no.4
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• pp.246-250
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• 2004

We have investigated the effects of boron added to Cu film on the Cu-Ti reaction and microstructural evolution of Cu(B) alloy film during annealing of Cu(B)/Ti/$SiO_2$/Si structure. The result were compared with those of Cu(B)/$SiO_2$ structure to identify the effects of Ti glue layers on the Boron behavior and the result grain growth of Cu(B) alloy. The vacuum annealing of Cu(B)/Ti/$SiO_2$ multilayer structure allowed the diffusion of B to the Ti surface and forming $TiB_2$ compounds at the interface. The formed $TiB_2$ can act as a excellent diffusion barrier against Cu-Ti interdiffusion up to $800^{\circ}C$. Also, the resistivity was decreased to $2.3\mu$$\Omega$-cm after annealing at $800^{\circ}C$. In addition, the presence of Ti underlayer promoted the growth Cu(l11)-oriented grains and allowed for normal growth of Cu(B) film. This is in contrast with abnormal growth of randomly oriented Cu grains occurring in Cu(B)/$SiO_2$ upon annealing. The Cu(B)/Ti/$SiO_2$ structure can be implemented as an advanced metallization because it exhibits the low resistivity, high thermal stability and excellent diffusion barrier property.

• Transactions on Electrical and Electronic Materials
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• v.1 no.2
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.

• ETRI Journal
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• v.27 no.1
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• pp.118-121
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• 2005

Silicon dioxide ($SiO_2$) films prepared by plasma-enhanced atomic-layer deposition were successfully grown at temperatures of $100\;to\;250^{\circ}C$, showing self-limiting characteristics. The growth rate decreases with an increasing deposition temperature. The relative dielectric constants of $SiO_2$ films are ranged from 4.5 to 7.7 with the decrease of growth temperature. A $SiO_2$ film grown at $250^{\circ}C$ exhibits a much lower leakage current than that grown at $100^{\circ}C$ due to its high film density and the fact that it contains deeper electron traps.

• Journal of the Korean Ceramic Society
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• v.27 no.1
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• pp.79-85
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• 1990

A study on the oxidation of SiO2 sensing layer was done at 950, 1000, 105$0^{\circ}C$ under dry O2 atmosphere. The rate determining step around the oxide layer thickness, 1000$\AA$ was different with the oxidation temperature, as follows ; ⅰ) linear growth at 95$0^{\circ}C$ and ⅱ) parabolic growth at 100$0^{\circ}C$ and 105$0^{\circ}C$. The flatness of SiO2 film was observed within $\pm$1% and surface state charge density was reduced by annealing in N2 atmosphere. Finally, pH sensitivity of SiO2 film, in the range of pH 3-9, was 20mV/pH.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.57-58
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• 2008

Microcrystalline (${\mu}c$) silicon thin films were prepared on glass by plasma-enhanced-chemical-vapor-deposition (PECVD) at various substrate temperature, and dilution ratio of $H_2$ with $SiH_4$. The structural and optical properties of. the ${\mu}c-Si$ thin films were investigated using XRD and UV-VIS spectrophotometer. The ${\mu}c-Si$ thin film with 42 nm grain size was grown at optimal condition of 2.5 Torr, spacing between electrodes of 3cm, deposition time of 3000s, RF power of 200W, substrate temperature of $350^{\circ}C$, $SiH_4$ ($20%SiH_4$+80%He) of 50sccm, and $H_2$ of 100sccm.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.548-551
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• 2002

The crystallization of amorphous silicon (a-Si) was achieved using a field aided lateral crystallization (FALC) process at 350 $^{\circ}C$. Under the influence of an electric field, Cu is found to drastically enhance the lateral crystallization velocity of a-Si. When an electric field was applied to the selectively Cu-deposited a-Si film during the heat treatment at temperature as low as 350 $^{\circ}C$, dendrite-shaped crystallization of a-Si progressed toward Cu-free region and the crystallization from negative electrode side toward positive electrode side was accelerated. We identified that 1000${\AA}$ thick a-Si film was completely crystallized by Cu-FALC process at 350 $^{\circ}C$ by TEM analysis.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.7
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• pp.670-674
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• 1991

This paper presents the material properties of LPCVD silicon films formed using Si2H6 gas at various deposition temperatures. To study the structural properties depending on the deposition temperature, XRD, EBD and TEM analyses were used. The maximum grain size in this experiment was obtained at the deposition temperature of 485ø C. It is discussed that LPCVD films formed below the deposition temperature of 485ø C are promising for low temperature TFT applications. The enhancement of the film characteristics results from the reduction of grain boundary density. We also observed that the film properties of Si2H6 at 600ø C was quite different from those of Si H4 at 600ø C. It has shown that the grain structure from a TEM analysis was elliptical and not dependent on the deposition temperature.

• Journal of the Korean Ceramic Society
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• v.35 no.5
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• pp.486-492
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• 1998

Silicon carbide (SiC) thin films were deposited on the porous silicon substrates by chemical vapour de-position(CVD) using MTS as a source material. The deposited films were ${\beta}$-SiC with poor crystallity con-firmed by XRD measurement. It was considered that the films showed the mixed characteistics of cry-stalline and amorphous SiC where amorphous SiC where amorphous SiC played a role of buffer layer in interface between as-dep films and Si substrate. The buffer layer reduced lattice mismatch to some extent the generally occurs when SiC films are deposited on Si. The low temperature (10K) PL (phtoluminescence) studies showed two broad bands with peaks at 600 and 720 for the films deposited at 1100$^{\circ}C$ The maximum PL peak of the crystalline SiC was observed at 600 nm and the amrophous SiC of 720 nm was also confirmed. PL peak due the amorphous SiC was smaller than that of the crystalline SiC, PL of porous Si might be disapperared due to densification during heat treatment.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.199-208
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• 1993

The effect of nucleation free energy related to Si surface states on diamond film growth behavior has been studied. Ar first, the three kinds of diamond thin films (A, B, C) were deposited on various Si substrates (A-Si, B-Si, C-Si) whose surfaces were polished with 1 ${\mu}m$ diamond paste, 6 ${\mu}m$ Al_2O_3$ powder and 12 ${\mu}m$ Al_2O_3$ powder respectively. And then, relative nucleation free energy calculated is ${\Delta}G_{A-Si}<{\Delta}G_{B-Si}<{\Delta}G_{C-Si}$. Although there are some difference in grain size, shape and nucleated size, the thin films on A-Si and B-Si were diamond including a small amount of DLC which was confirmed by AES, SEM, XRD, and RHEED. Namely, the diamonds of films (B) were not nucleated in scratches but in dents and larger in grain size compare with the film (C) of which diamond sere nucleated not only scratches but also dents. And, the sphere diamond which is not general shape was grown on C-Si. After all, the sphere was turned out to be the diamond including much graphite as a result of the AES in situ depth profiling. Consequently, the diamond shape and quality grown on Si were Changed from the crystal which the (100) and (110) planes were predominent to the crystal in which (111) plane was predominent, and newt to sphere shape diamond including much graphite according as the nucleation free energy increases.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.784-787
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• 2002

We prepared the PLT(28) thin film by using sol-gel method and investigated the structure and electrical properties of the film. With the XRD and AFM analyses, it is found that PLT(28) thin film annealed at 6sot has a complete perovskite structure and its surface roughness is about 22$\AA$. We prepared PLT(28) thin film on the Pt/TiO$_{x}$SiO$_2$/Si substrate, in which the specimen has a planar capacitor structure, and analyzed the electrical properties of PLT(28) thin film. In result, PLT(28) thin film has a paraelectric phase and its dielectric constant and loss tangent at 10kHz are 761 and 0.024, respectively. Also, the storage charge density and leakage current density of PLT(28) thin film at W are 134fC/$\mu$m2 and 1.01 $\mu$A/cm2, respectively. As a result of this, we concluded that the PLT(28) thin film is a promising material to be used as a capacitor dielectrics for next generation DRAM.M.