• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.11a
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• pp.11-11
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• 2004

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.57-64
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• 2007

New Chip-on-glass technology to attach an Si chip directly on the glass substrate of LCD panel was studied with local heating method of the Si chip by using thin film heater fabricated on the Si chip. Square-shaped Cu thin film heater with the width of $150\;{\mu}m$, thickness of $0.8\;{\mu}m$, and total length of 12.15 mm was sputter-deposited on the $5\;mm{\times}5\;mm$ Si chip. With applying current of 0.9A for 60 sec to the Cu thin film heater, COG bonding of a Si chip to a glass substrate was successfully accomplished with reflowing the Sn-3.5Ag solder bumps on the Si chip.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.338-341
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• 1996

Anodic bonding is a key technology for micromechanical components. The main advantages of this method can be formed in a batch process, over large areas, and is permanent and irreversible. In this paper, the bonding was performed at temperatures ranging from 300 to 450 $^{\circ}C$, voltages 400 to 1000 V, and times 10 to 30 minutes. The sizes of the Si and the Pyrex #7740 glass were 6 mm $\times$6 mm, respectively. Bonding processes and voids were observed by the optical microscope, and the composition of the anodic bonding interface was analyzed by the SIMS. Optimum condition of the anodic bonding was at temperature above 40$0^{\circ}C$ without regard to voltage.

• Journal of the Korean Ceramic Society
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• v.30 no.5
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• pp.357-364
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• 1993

Chemical reaction occurred in the interface of Mn-Zn ferrite and glass after bonding. Effects of the formation of reaction layer on the magnetic properties were investigated. The composition of glass was 23PbO-61SiO2-6ZnO-8Na2O-2K2O and the ferrite was chosen to have a high permeability. Toroid samples of ferrites bonded with glasses, were heat-treated at $700^{\circ}C$, 80$0^{\circ}C$ and 90$0^{\circ}C$ for 1h. The reaction was observed to increase with bonding temperature, resulting in the development of reaction layer. Subsequently the initial permeability was found to be decreased. The permeabilities decreased by 25% with increasing bonding temperature from $700^{\circ}C$ to 80$0^{\circ}C$. At the bonding temperature of 90$0^{\circ}C$, the permeability was decreased by 45%, compared to that of 80$0^{\circ}C$.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.70-72
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• 2000

In this paper, a spacer process for FED(Field Emission Display) was developed with the glass to glass anodic bonding technology using Al film as an interlayer and a 3.5 inch monochromatic type FED was fabricated. Holder to dislocate spacers vertically was designed with (110) Si wafer by bulk etching. Spacers, $100\mum\; width\; and\; 1000\mum$ height, were formed on anode panel by spacer to glass anodic bonding and the fabricated FED was operated for emission at 1㎸ anode voltage.

• Journal of the Korean Ceramic Society
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• v.20 no.1
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• pp.3-12
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• 1983

In the present study an attempt was made to synthesize the $Al_2O_3$.$2SiO_2$ glass in which atomic ratio is Al:Si=1:1 by sol-gel process. And at such a low temperature as 55$0^{\circ}C$ clear amorphous gel derived glass with Si-O-Al bonding was obtained. $Si(OC_2H_5)_4$ and $Al(NO_3)_3$.$9H_2O$ were used as the precursor and among the mutual solvents only n-butanol gave good results for the synthesis of the gel derived glass. Partial hydrolysis of TEOS with one-fold mol of $H_2O$ prior to the reaction with aluminum nitrate gave the better results., Total oxide content to the total reactants by weight was affective to the results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.10
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• pp.779-784
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• 2001

In this work, we studied the characteristics of nitride films for the optimization of PMD(pro-metal dielectric) linear process, which can be applied to the recent semiconductor manufacturing process. We split the deposit condition of nitride films into four parts such as PO(protect overcoat) nitride, baseline, low hydrogen and high stress and low hydrogen, respectively. We tried to find out correlation between BPSG deposition and densification. In order to analyze the changes of Si-H and Si-NH-Si bonding density, we used FTIR area method. We also investigated the crack generation on wafer edge after BPSG densification, and the changes of nitride film stress as a function of RF power variation to judge whether the deposited films.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.13-20
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• 2008

This paper describes the methods of spacer-fabrication for wafer-level CIS(CMOS Image Sensor) assembly. We propose three methods using SU-8, PDMS and Si-interposer for the spacer-fabrication. For SU-8 spacer, novel wafer rotating system is developed and for PDMS(poly-dimethyl siloxane) spacer, new fabrication-method is used to bond with alignment of glass/PDMS/glass structure. And for Si-interposer, DFR(Dry Film Resist) is used as adhesive layer. The spacer using Si-interposer has the strongest bonding strength and the strength is 32.3MPa with shear.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.4-8
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• 2002

The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.103-105
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• 2003

COG (Chip on Glass) technology using solder bump reflow has been investigated to attach IC chip directly on glass substrate of LCD panel. As It chip and LCD panel have to be heated to reflow temperature of the so]der bumps for COG bonding, it is necessary to use low-temperature solders to prevent the damage of liquid crystals of LCD panel. In this study, using the Sn-52In solder bumps of $40{\mu}m$ pitch size, solder joints between Si chip and glass substrate were made at temperature below $150^{\circ}C$. The contact resistance of the solder joint was $8.58m\Omega$, which was much lower than that of the joint made using the conventional ACF bonding technique. The Sn-52In solder joints with underfill showed excellent reliability at a hot humid environment.