• KIEE International Transactions on Electrophysics and Applications
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• 제4C권3호
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.

• 센서학회지
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• 제22권3호
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• pp.175-180
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• 2013

This paper describes the characteristics of cubic silicon carbide (3C-SiC) films grown on a carbonized Si(100) substrate, using hexamethyldisilane (HMDS, $Si_2(CH_3)_6$) as a safe organosilane single precursor in a nonflammable $H_2$/Ar ($H_2$ in Ar) mixture carrier gas by atmospheric pressure chemical vapor deposition (APCVD) at $1280^{\circ}C$. The growth process was performed under various conditions to determine the optimized growth and carbonization condition. Under the optimized condition, grown film has a single crystalline 3C-SiC with well crystallinity, small voids, low residual stress, low carrier concentration, and low RMS. Therefore, the 3C-SiC film on the carbonized Si (100) substrate is suitable to power device and MEMS fields.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.41-42
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• 2008

p-type(100) Si 위에 BTMSM과 산소를 혼합한 전구체를 가지고 PECVD 방법을 사용 하여 저유전상수를 갖는 SiOCH막을 형성하였다. 알루미늄 전극을 구현한 MIS (Al/SiOCH/p-si(100)) 구조의 커패시터를 가지고 C-V 특성을 측정하여 유전상수를 계산하였다. 상온에서 증착된 SiOCH 박막의 유전상수는 $450^{\circ}C$에서 30분 동안 열처리 후 뚜렷하게 감소하는 경향을 나타냈으며, 상온 및 대기압에서 공기 중에 노출시켜 자연 산화과정을 겪은 후에 각각의 유전상수는 전체적으로 증가하였지만, 열처리한 박막이 상대적으로 경시효과(aging effects)에 대하여 안정화된 것을 확인하였다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1993년도 춘계학술발표회
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• pp.62-63
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• 1993

Salicide(Self-aligned) CoSi$_2$의 형성을 알아보기 위하여, 단결정 실리콘 기판내에 불순물 주입에 따른 실리사이드의 형성영향을 알아보는, As,BF$_2$를 주입 한 시편과, 코발트와 SiO$_2$를 증착한 시편을 준비하였다. RF sputtering 방식으로 각각의 기판위에 코발트를 증착 한 후 Rapid Thermal Annealing(RTA) 온도 400-100$0^{\circ}C$영역에서 20초 동안 열처리 하였다. RTA 온도 80$0^{\circ}C$에서 비저항이 약 18$\mu$$\Omega$-cm정도의 CoSi$_2$를 형성 시켰으며 SEM 과 $\alpha$-step 으로 확인된 Si 기판과 코발트 실리사이드의 계면 roughness 및 surface roughness는 우수하였고, CoSi$_2$의 두께 증가에 따른 실리콘 소모량의 증가에 따라 기판내에 있던 As,BF$_2$ 이온들이 실리사이드내로 재분포 되는 현상을 보였다.CoSi$_2$/Si 계면간의 열적안정성은 $N_2$분위기로 30분간 Furnace Annealing 온도 100$0^{\circ}C$까지 CoSi$_2$의 응집화 현상이 일어나지 않았다.

• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.95-100
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• 2000

For the well-controlled growing in-situ heavily phosphorus doped polycrystalline Si films directly on Si wafer by reduced pressure chemical vapor deposition, a study is made of the two step growth. When in-situ heavily phosphorus doped Si films were deposited directly on Si (100) wafer, crystal structure in the film is not unique, that is, the single crystal to polycrystalline phase transition occurs at a certain thickness. However, the well-controlled polycrtstalline Si films deposited by two step growth grew directly on Si wafers. Moreover, the two step growth, which employs crystallization of grew directly on Si wafers. Moreover, the two step growth which employs crystallization of amorphous silicon layer grown at low temperature, reveals crucial advantages in manipulating polycrystal structures of in-situ phosphorous doped silicon.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.130-130
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• 2009

This paper describes the temperature characteristics of polycrystalline 3C-SiC micro resonators. The 1.2 ${\mu}m$ and 0.4 ${\mu}m$ thick polycrystalline 3C-SiC cantilever and doubly clamped beam resonators with 60 ~ 100 ${\mu}m$ lengths were fabricated using a surface micromachining technique. Polycrystalline 3C-SiC micro resonators were actuated by piezoelectric element and their fundamental resonance was measured by a laser vibrometer in vacuum at temperature range of $25{\sim}200^{\circ}C$. The TCF(Temperature Coefficient of Frequency) of 60, 80 and 100 ${\mu}m$ long cantilever resonators were -9.79, -7.72 and -8.0 $ppm/^{\circ}C$. On the other hand, TCF of 60, 80 and 100 ${\mu}m$ long doubly clamped beam resonators were -15.74, -12.55 and -8.35 $ppm/^{\circ}C$. Therefore, polycrystalline 3C-SiC resonators are suitable with RF MEMS devices and bio/chemical sensor applications in harsh environments.

• 한국전기전자재료학회논문지
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• 제22권4호
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• pp.314-317
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• 2009

This paper describes the temperature characteristics of polycrystalline 3C-SiC micro resonators. The $1.2{\mu}m$ and $0.4{\mu}m$ thick polycrystalline 3C-SiC cantilever and doubly clamped beam resonators with $60{\sim}100{\mu}m$ lengths were fabricated using a surface micromachining technique. Polycrystalline 3C-SiC micro resonators were actuated by piezoelectric element and their fundamental resonance was measured by a laser vibrometer in vacuum at temperature range of $25{\sim}200^{\circ}C$. The TCF(Temperature Coefficient of Frequency) of 60, 80 and 100 On long cantilever resonators were -9.79, -7.72 and -8.0 ppm/$^{\circ}C$. On the other hand, TCF of 60, 80 and $100{\mu}m$ long doubly clamped beam resonators were -15.74, -12.55 and -8.35 ppm/$^{\circ}C$. Therefore, polycrystalline 3C-SiC resonators are suitable with RF MEMS devices and bio/chemical sensor applications in harsh environments.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 춘계학술발표강연 및 눈문개요집
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• pp.14-14
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• 1999

• 한국결정성장학회지
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• 제9권1호
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• pp.34-38
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• 1999

유기금속 화학 증착법(MOCVD)을 이용하여 Si(100) 기판 위에 $TiO_2$와 PbO의 동시 증착으로 $Pb(TMHD)_2$(PT) 박막을 증착하였다. 원료물질로는 Titanium tetra-isopropoxide(TTIP)와 $Pb(TMHD)_2$를 사용하였다. 증착온도를 $520^{\circ}C$, Pbdbfid을 30 sccm으로 고정하고, 전체유량을 750 sccm으로 하여 TTIP의 증발온도와 유량에 따른 PT 박막의 XRD 변화를 관찰하였다. PT 박막 생성은 TTIP의 증발온도 및 유량이 각각 48~$50^{\circ}C$와 18~22sccm 영역에서 생성되었으며, 생성된 박막과 기판의 계면에서는 Pb, Si, O의 상호확산을 관찰할 수 있었다.

• 한국전기전자재료학회논문지
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• 제17권12호
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• pp.1283-1288
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• 2004

Metal-ferroelectric-insulator-semiconductor(WFIS) capacitors using rapid thermal annealed LiNbO$_3$/AlN/Si(100) structure were fabricated and demonstrated nonvolatile memory operations. The capacitors on highly doped Si wafer showed hysteresis behavior like a butterfly shape due to the ferroelectric nature of the LiNbO$_3$ films. The typical dielectric constant value of LiNbO$_3$ film in the MFIS device was about 27, The gate leakage current density of the MFIS capacitor was 10$^{-9}$ A/cm$^2$ order at the electric field of 500 kV/cm. The typical measured remnant polarization(2P$_{r}$) and coercive filed(Ec) values were about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively The ferroelectric capacitors showed no polarization degradation up to 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulses of 1 MHz. The switching charges degraded only by 10 % of their initial values after 4 days at room temperature.e.