• Electrical & Electronic Materials
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• v.6 no.5
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• pp.417-427
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• 1993

액체질소하에서의 물리적인 현상 및 실험결과를 통하여 캐리어 냉동현상, 좁은 폭 및 숏트 채널효과를 포함한 문턱전압 모델, Surface Roughness Scattering 및 Ioniaed Impurity Scattering을 포함한 이동도 모델과 적합한 기판 전류모델이 제안되었으며 이 모델들은 모의실험 프로그램인 BSIM과 SPICE에 이식되었다. 제작된 링 오실레이터와 리플 가산기에 적용한 결과 측정한 데이타와 잘 부합되었다.

• Journal of the Korean Institute of Intelligent Systems
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• v.24 no.5
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• pp.457-461
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• 2014

Using $0.18{\mu}m$ CMOS process silicon neuron circuit of the pulse type for modeling biological neurons, were designed in the semiconductor integrated circuit. Neuron circuiSt providing is formed by MOS switch for initializing the input terminal of the capacitor to the input current signal, a pulse signal and an amplifier stage for generating an output voltage signal. Synapse circuit that can convert the current signal output of the input voltage signal, using a bump circuit consisting of NMOS transistors and PMOS few. Configure a chain of neurons for verification of the neuron model that provides synaptic neurons and two are connected in series, were performed SPICE simulation. Result of simulation, it was confirmed the normal operation of the synaptic transmission characteristics of the signal generation of nerve cells.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.4
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• pp.275-281
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• 2003

A new neural oscillator has been designed and fabricated in an 0.5 ${\mu}{\textrm}{m}$ double poly CMOS technology. The proposed neural oscillator consists of a nonlinear variable resistor with negative resistance as well as simple transconductors and capacitors. The variable negative resistor which is used as a input stage of the oscillator consists of a positive feedback transconductors and a bump circuit with Gaussian-like I-V curve. The proposed neural oscillator has designed in integrated circuit with SPICE simulations. Simulations of a network of 4 oscillators which are connected with excitatory and inhibitory synapses demonstrate cooperative computation. Measurements of the fabricated oscillator chip with a $\pm$ 2.5 V power supply is shown and compared with the simulated results.

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.2
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• pp.71-78
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• 2017

In This Paper, A DC-DC Boost Converter for Portable Device has been Proposed. The Converter Which is Operated with 1 MHz High Switching Frequency is Capable of Reducing Mounting Area of Passive Devices Such as Inductor and Capacitor, Consequently is Suitable for Portable Device. This Boost Converter Consists of a Power Stage and a Control Block and a Protect Block. Proposed DC-DC Boost Converter has been Designed a 0.18 um Magnachip CMOS Process Technology, we Examined Performances of the Fabricated Chip and Compared its Measured Results with SPICE Simulation Data. Simulation Results Show that the Output Voltage is 4.8 V in 3.3 V Input Voltage, Output Current 95 mA Which is Larger than 20~50 mA.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.9
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• pp.4159-4164
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• 2012

This paper presents a chaotic circuit with voltage controllability for secure communication applications. The proposed circuit which has two control voltages consists of the nonlinear function block(NFB) with three MOS transistors, one source follower and non-overlapping two-phase clock generator for sample and hold. By SPICE simulation, chaotic dynamics such as time waveform, frequency analysis and bifurcations were analyzed. SPICE results showed that proposed circuit can make various chaotic signals by control voltage.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.4
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• pp.273-278
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• 2016

In this paper, chaotic circuit of the Lorentz system using multipliers, operational amplifiers, capacitor, fixed resistor and variable resistor for control has been designed in a electronic circuit. Through PSPICE program, electrical characteristics such as time waveforms, frequency spectra and phase attractors analyzed. And in the special area ($10{\sim}100k{\Omega}$) of the $500k{\Omega}$ control variable resistor, the circuit showed chaotic dynamics. Also, we implemented the circuit in a electronic hardware system with discrete elements. Measured results of the circuit coincided with simulated data.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.12
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• pp.6046-6051
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• 2012

In this paper, we designed a Chua's chaotic circuit using transcondcutor based nonlinear resistor for secure communication applications. Proposed chaotic circuit consist of passive devices such as L and C, a MOS based variable resistor and a transcondcutor based Chua's diode. From SPICE simulation results, the proposed circuit showed variable chaotic dynamics through time waveforms, frequency analysis and phase plots.

• Journal of the Korean Institute of Intelligent Systems
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• v.16 no.1
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• pp.24-29
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• 2006

A new oscillatory neural circuit with computational function has been designed and been designed and fabricated in an $0.5{\mu}m$ double poly CMOS technology. The proposed oscillatory circuit consists of 3 neural oscillators with excitatory synapses and a neural oscillator with inhibitory synapse. The oscillator block which is a basic element of the neural circuit is designed with a variable negative resistor and 2 transconductors. The variable negative resistor which is used as a input stage of the oscillator consist of a bump circuit with Gaussian-like I-V curve. SPICE simulations of a designed neural circuit demonstrate cooperative computation. Measurements of the fabricated neural chip in condition of ${\pm}$ 2.5 V power supply are shown and compared with the simulated results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.71-78
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• 2005

In this paper, we propose a transceiver for noncoherent OOK(On-Off Keying) Ultra Wide Band system based on magnitude detection. The proposed transceiver are designed using 0.18 micron CMOS technology and verified by simulation using SPICE and measurement. The proposed transceiver consist of parallelizer, Analog-to-Digital converter, clock generator, PLL and impulse generator. The time resolution of 1ns is obtained with 125MHz system clocks and 8x parallelization is carried out. The synchronized eight outputs with 2-bit resolution are delivered to the baseband. Impulse generator produces 1ns width pulse using digital CMOS gates. The simulation results and measurement show the feasibility of the proposed transceiver for UWB communication system.

• 전자공학회논문지 IE
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• v.46 no.1
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• pp.16-22
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• 2009

Integrated circuit of a pulse-type neuron for Hodgkin-Huxley model is implemented in a $0.5{\mu}m$ 1 poly 2 metal CMOS technology. Proposed pulse-type neuron model consist of input stage with summing function and pulse generating block which make neuron pulse above threshold value. Pulse generating circuit consist of several transistors, capacitors and negative resistor with a charge supply function. SPICE simulation results show that neuron pulse is generated above threshold current of 70 nA. Measurements of the fabricated pulse type neuron chip in condition of 5 V power supply are shown and compared with the simulated results.