Journal of the Institute of Electronics Engineers of Korea SC (전자공학회논문지SC)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Integrated Circuit Design and Implementation of a Novel CMOS Neural Oscillator using Variable Negative Resistor

가변 부성저항을 이용한 새로운 CMOS 뉴럴 오실레이터의 집적회로 설계 및 구현

  • Published : 2003.07.01
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Abstract

A new neural oscillator has been designed and fabricated in an 0.5 ${\mu}{\textrm}{m}$ double poly CMOS technology. The proposed neural oscillator consists of a nonlinear variable resistor with negative resistance as well as simple transconductors and capacitors. The variable negative resistor which is used as a input stage of the oscillator consists of a positive feedback transconductors and a bump circuit with Gaussian-like I-V curve. The proposed neural oscillator has designed in integrated circuit with SPICE simulations. Simulations of a network of 4 oscillators which are connected with excitatory and inhibitory synapses demonstrate cooperative computation. Measurements of the fabricated oscillator chip with a $\pm$ 2.5 V power supply is shown and compared with the simulated results.

0.5㎛ 2중 폴리 CMOS 공정을 이용하여 새로운 뉴럴 오실레이터를 설계, 제작하였다. 제안하는 뉴럴 오실레이터는 트랜스콘덕터 및 캐패시터와 비선형 가변 부성저항으로 이루어진다. 뉴럴 오실레이터의 입력단으로 사용되는 비선형 가변 부성저항은 정귀환의 트랜스콘덕터와 가우시안 분포의 전류전압 특성을 지니는 범프 회로를 이용하여 구현하였다. 또한 SPICE 모의실험을 통하여 제안한 오실레이터의 특성분석 후 집적회로 설계를 실시하였다. 한편 흥분성 및 억제성 시냅스로 연결된 4개의 뉴럴 오실레이터로 간단한 신경회로망을 구성하여 그 특성을 확인하였다. 집적회로로 제작된 뉴럴 오실레이터에 대하여 ± 2.5 V 전원 조건하에서 측정된 결과를 분석하고 모의실험 결과와 비교한다.

Keywords

References

  1. J. M. Zurada, 'Introduction to Articial Neural Systems,' PWS Publishing Company 1992
  2. 이수영, '신경회로망의 VLSI 구현,' 전자공학회지, 제 18 권 제 10 호, pp. 750-756, 1991
  3. W. J. Freeman, Y. Yao, B. Burke, 'Central pattern generating and recognizing in olfactory bulb: A correlation learning rule', Neural Networks, vol. 1, pp. 227-288, 1998 https://doi.org/10.1016/0893-6080(88)90264-X
  4. G. Moon, M. Zaghloul, and R. Newcomb, 'CMOS Design of Pulse Coded Adaptive Neural Processing Element using Neural-Type Cells, IEEE International Symposium on Circuits and Systems, San Diego, CA, pp.2224 - 2227, May, 1992 https://doi.org/10.1109/ISCAS.1992.230548
  5. B. Linares-Barranco, E. Sanchez-Sinencio, A. Rodriguez-Vaquez, J. L. Huertas, 'CMOS Analog Neural Network Systems based on Oscillatory Neurons,' IEEE International Symposium on Circuits and Systems, pp. 2236-2239, May, 1992 https://doi.org/10.1109/ISCAS.1992.230515
  6. V. M. G. Tavares, J. C. Principe, J. G. Harris, 'A silicon olfactory bulb oscillator', In IEEE International Symposium on Circuits and Systems, Genava, Switzerland, May 2000 https://doi.org/10.1109/ISCAS.2000.857451
  7. Q. Luo, J.G. Harris, A novel neural oscillator and its implementation in analog VLSI, IEEE International symposium on Circuits and Systems, pp. 245-248, Australia, May 2001 https://doi.org/10.1109/ISCAS.2001.921293
  8. Hiroyuki Kanasugi, Seiichiro Moro, etc., 'Vander Pol oscillators coupled by piecewise- linear negative resistor', IEICE Trans. Fundamentals, Vol. E79-A, No. 10, pp. 1551-1562, 1996
  9. Shinichiro Kanoh, Hideki Kumagai, etc., 'Basic characteristics of hardware neuron model based on CMOS negative resistance', In IEEE International Symposium on Circuits and Systems, pp. 579-584, 1999 https://doi.org/10.1109/ICONIP.1999.845659
  10. T. Delbruck, 'Bump Circuits for Computing Similarity and Dissimilarity of Analog Voltage' Proceedings of International Joint Conference on Neural Networks, July 8-12, 1991, Seattle WA, pp I-475-479 https://doi.org/10.1109/IJCNN.1991.155225
  11. Carver Mead, Analog VLSI and neural systems, Addison-wesley publishing company, 1989