Journal of the Korean Institute of Intelligent Systems (한국지능시스템학회논문지)

Korean Institute of Intelligent Systems (한국지능시스템학회)
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Hardware Implementation of a New Oscillatory Neural Circuit with Computational Function

연산기능을 갖는 새로운 진동성 신경회로의 하드웨어 구현

  • Published : 2006.02.01
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Abstract

A new oscillatory neural circuit with computational function has been designed and been designed and fabricated in an $0.5{\mu}m$ double poly CMOS technology. The proposed oscillatory circuit consists of 3 neural oscillators with excitatory synapses and a neural oscillator with inhibitory synapse. The oscillator block which is a basic element of the neural circuit is designed with a variable negative resistor and 2 transconductors. The variable negative resistor which is used as a input stage of the oscillator consist of a bump circuit with Gaussian-like I-V curve. SPICE simulations of a designed neural circuit demonstrate cooperative computation. Measurements of the fabricated neural chip in condition of ${\pm}$ 2.5 V power supply are shown and compared with the simulated results.

연산기능을 갖는 새로운 진동성 신경회로를 설계하여 $0.5{\mu}m$ CMOS 공정으로 칩 제작을 하였다. 제안하는 진동성 신경회로는 흥분성 시냅스를 가진 3개의 신경진동자와 억제성 시냅스를 가진 1개의 신경진동자로 이루어진다. 사용된 진동자는 가변 부성저항과 트랜스콘덕터를 이용하여 설계하였다. 진동자의 입력단으로 사용되는 가변 부성저항은 가우시안 분포의 전류전압 특성을 지니는 범프 회로를 이용하여 구현하였다. 뉴럴 회로의 SPICE 모의실험결과 간단한 연산기능을 확인하였다. 제작된 칩을 ${\pm}$ 2.5 V 의 전원전압 조건에서 측정하였고 이를 모의실험결과와 비교 분석하였다.

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References

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