• 전자공학회논문지A
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• 제31A권1호
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• pp.71-76
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• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• 한국전기전자재료학회논문지
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• 제15권11호
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• pp.958-962
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• 2002

This paper reports on the fabrication of free-standing microstructures by DRIE (deep reactive ion etching). SOI (Si-on-insulator) structures with buried cavities are fabricated by SDB (Si-wafer direct bonding) technology and electrochemical etch-stop. The cavity was formed the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the formed cavity under vacuum condition at -760 mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing (100$0^{\circ}C$, 60 min.), the SDB SOI structure with a accurate thickness and a good roughness was thinned by electrochemical etch-stop in TMAH solution. Finally, it was fabricated free-standing microstructures by DRIE. This result indicates that the fabrication technology of free-standing microstructures by combination SDB, electrochemical etch-stop and DRIE provides a powerful and versatile alternative process for high-performance bulk micromachining in MEMS fields.

• E2M - 전기 전자와 첨단 소재
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• 제8권2호
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• pp.165-170
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• 1995

This paper describes the fabrication and characteristics of a Si Hall sensor fabricated on a SOI (Si-on-insulator) structure. The SOI structure was formed by SDB(Si-wafer direct bonding) technology and the insulator of the SOI structure was used as the dielectrical isolation layer of a Hall sensor. The Hall voltage and sensitivity of the implemented SDB SOI Hall sensors showed good linearity with respect to the applied magnetic flux density and supplied current. The product sensitivity of the SDB SOI Hall sensor was average 600V/A.T and its value has been increased up to 3 times compared to that of bulk Si with buried layer of 10.mu.m. Moreover, this sensor can be used at high-temperature, high-radiation and in corrosive environments.

• 한국정밀공학회지
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• 제16권3호통권96호
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• pp.78-83
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• 1999

The bonding interface is dependent on the properties of surfaces prior to SDB(silicon wafer direct bonding). In this paper, we prepared silicon surfaces in several chemical solutions, and annealed bonding wafers which were combined with thermally oxidized wafers and bare silicon wafers in the temperature range of $600{\times}1000^{\circ}C$. After bonding, the bonding interface is investigated by an infrared(IR) topography system which uses the penetrability of infrared through silicon wafer. Using this procedure, we observed intrinsic bubbles at elevated temperatures. So, we verified that these bubbles are related to cleaning and drying conditions, and the interface oxides on silicon wafer reduce the formation of intrinsic bubbles.

• 센서학회지
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• 제11권1호
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• pp.54-59
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• 2002

본 논문은 Si기판 직접접합기술과 전기화학적 식각정지를 이용하여 마이크로 시스템용 매몰 공동을 갖는 SOI 구조물의 일괄제조에 대한 새로운 공정기술에 관한 것이다. 저비용의 전기화학적 식각정지법으로 SOI의 정확한 두께를 제어하였다. 핸들링 기판 위에서 Si 이방성 습식식각으로 공동을 제조하였다. 산화막을 갖는 두 장의 Si기판을 직접접합한 후, 고온 열처리($1000^{\circ}C$, 60분)를 시행하고 전기화학적 식각정지로 매몰 공동을 갖는 SDB SOI 구조를 박막화하였다. 제조된 SDB SOI 구조물 표면의 거칠기는 래핑과 폴리싱에 의한 기계적인 방법보다도 우수했다. 매몰 공동을 갖는 SDB SOI 구조는 새로운 마이크로 센서와 마이크로 엑츄에이터에 대단히 효과적이며 다양한 응용이 가능한 기판으로 사용될 것이다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.557-560
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• 2000

Combination of SDB(Si-wafer Direct Bonding) and electrochemical etch-stop in TMAH anisotropic etchant can be used to create a variety of MEMS(Micro Electro Mechanical System). Especially, fabrication of SDB SOI structures using electrochemical etch-stop is accurate method to fabrication of 3D(three-dimensional) microstructures. This paper describes on the fabrication of SDB SOI structures with sealed cavity for MEMS applications and thickness control of active layer on the SDB SOI structure by electrochemical etch-stop. The flatness of fabricated SDB SOI structure is very uniform and can be improved by addition of TMAH to IPA and pyrazine.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.579-582
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• 2000

This paper described on the fabrication of SOI(Si-on-insulator) structures with buried cavities by SDB technology and eletrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -760mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annaling(100$0^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated the SDB SOI structure with buried cavities as well as an accurate control and a good flatness.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1995년도 춘계학술대회 논문집
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• pp.227-229
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• 1995

Using thermal oxide SiO$_2$ as a dielectrical isolation layer, SOI Hall sensors without pn junction isolation have been fabricated on Si/SiO$_2$/Si structures. The SOI structure was formed by SDB (Si- wafer direct bonding) technology. The Hall voltage and the sensitivity of Si Hall devices implemented on the SDB SOI structure show good linearity with respect to the appled magnetic flux density and supplied current. The product sensitivity of the SDB SOI Hall device is average 600V/V.T. In the trmperature range of 25 to 300$^{\circ}C$, the shifts of TCO(Temperature Coefficient of the Offset Voltage) and TCS(Temperature Coefficient of the Product Sensitivity) are less than ${\pm}$ 6.7x10$\^$-3/ C and ${\pm}$8.2x10$\^$04/$^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of Hall sensors with a high-sensitivity and high-temperature operation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1890-1892
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -750 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.

• 전자공학회논문지
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• 제50권6호
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• pp.305-310
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• 2013

본 연구는 Si/$SiO_2$/Si-sub 구조의 SDB(silicon-direct-bonding) 웨이퍼를 이용한 고온용 압력센서의 제작 및 특성을 연구한 것이다. 압력센서는 SDB 웨이퍼의 첫 번째 층의 단결정 실리콘을 이용하여 압저항을 제작하기 때문에 감도가 우수하며, 두 번째 층의 산화막으로 압저항과 실리콘 기판을 절연 분리하여, 일반적인 실리콘소자의 사용 온도 한계인 $120^{\circ}C$ 이상의 고온에서도 사용이 가능하다. 제작된 압력센서는 고감도의 압력감도 및 센서 출력의 직선성 및 히스테리시스 특성이 매우 우수함을 알 수 있었다.