• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.741-744
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -760 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.

• 센서학회지
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• 제1권2호
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• pp.131-145
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• 1992

본 논문은 SOI트랜스듀서 및 회로를 위해, Si 직접접합과 M-C국부연마법에 의한 박막SOI구조의 형성 공정을 기술한다. 또한, 이러한 박막SOI의 전기적 및 압저항효과 특성들을 SOI MOSFET와 cantilever빔으로 각각 조사했으며, bulk Si에 상당한다는 것이 확인되었다. 한편, SOI구조를 이용한 두 종류의 압력트랜스듀서를 제작 및 평가했다. SOI구조의 절연층을 압저항의 유전체분리층으로 이용한 압력트랜스듀서의 경우, $-20^{\circ}C$에서 $350^{\circ}C$의 온도범위에 있어서 감도 및 offset전압의 변화는 자각 -0.2% 및 +0.15%이하였다. 한편, 절연층을 etch-stop막으로 이용한 압력트랜스듀서에 있어서의 감도변화를 ${\pm}2.3%$의 표준편차 이내로 제어할 수 있다. 이러한 결과들로부터 개발된 SDB공정으로 제작된 SOI구조는 집적화마이크로트랜스듀서 및 회로개발에 많은 장점을 제공할 것이다.

• 한국전기전자재료학회논문지
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• 제15권11호
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• pp.958-962
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• 2002

This paper reports on the fabrication of free-standing microstructures by DRIE (deep reactive ion etching). SOI (Si-on-insulator) structures with buried cavities are fabricated by SDB (Si-wafer direct bonding) technology and electrochemical etch-stop. The cavity was formed the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the formed cavity under vacuum condition at -760 mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing (100$0^{\circ}C$, 60 min.), the SDB SOI structure with a accurate thickness and a good roughness was thinned by electrochemical etch-stop in TMAH solution. Finally, it was fabricated free-standing microstructures by DRIE. This result indicates that the fabrication technology of free-standing microstructures by combination SDB, electrochemical etch-stop and DRIE provides a powerful and versatile alternative process for high-performance bulk micromachining in MEMS fields.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1890-1892
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -750 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1431-1433
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• 1995

This paper describes the characteristics of Si Hall sensors fabricated on a SOI(Si-on-insulator} structure, in which the SOI structure was forrmed by SDB(Si-wafer direct bonding) technology. The Hall voltage and the sensitivity of implemented Si Hall devices show good linearity with respect to the applied magnetic flux density and supplied current. The product sensitivity of the SDB SOI Hall device is average $600V/A{\cdot}T$. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(Temperature Coefficient of the Offset Voltage) and TCS(Temperature Coefficient of the product Sensitivity) are less than ${\pm}6.7{\times}10^{-3}/^{\circ}C$ and ${\pm}8.2{\times}10^{-4}/^{\circ}C$, respectively. From these results, Si Hall sensors using the SOI structure presented here are very suitable for high-temperature operation.

• 센서학회지
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• 제3권1호
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• pp.5-11
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• 1994

본 논문은 실리콘기판 직접접합기술과 에피택샬 성장법으로 각각 형성한 SOI구조, 즉 Si/$SiO_{2}$/Si 및 Si/$Al_{2}O_{3}$/Si 상에 제작한 압저항형 압력센서의 특성을 기술한다. SOI구조의 절연층을 압저항의 유전체 분리막으로 이용한 압력센서는 $300^{\circ}C$ 까지 사용 가능했다. SOI구조의 절연층을 박막 실리콘 다아어프램 형성시 에칭 중지막으로 이용한 경우, 제작된 압력센서의 200개 소자들에 대한 압력감도의 변화는 ${\pm}2.3%$ 이내로 제어 가능했다. 더구나 실리콘 기판 직접접합기술과 에피택샬 성장법의 결합으로 형성한 더불 SOI구조($Si/Al_{2}O_{3}/Si/SiO_{2}/Si$)상에 제작된 압력센서는 고온분위기에서 사용 가능할 뿐만 아니라 고분해 능력을 갖는 특성을 보였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.447-450
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• 2001

Abstract-Si direct bonding(SDB) technology is very attractive for both Si-on-insulator(SOI) electric devices and MEMS applications because of its stress free structure and stability. This paper presents on pre-bonding according to HF pre-treatment conditions in Si wafer direct bonding. The characteristics of bonded sample were measured under different bonding conditions of HF concentration, and applied pressure. The bonding strength was evaluated by tensile strength method. The bonded interface and the void were analyzed by using SEM and IR camera, respectively. Components existed in the interlayer were analysed by using FT-lR. The bond strength depends on the HF pre-treatment condition before pre-bonding (Min : 2.4kgf/cm$^2$∼Max : 14.9kgf/cm$^2$).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.370-373
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• 1999

Si direct bonding (SDB) technology is very attractive for both Si-on-insulator(SOI) electric devices and MEMS applications because of its stress free structure and stability. This paper presents on- pre treatment conditions in Si wafer direct bonding, The paper resents on pre-bonding according to HF pre-treatment conditions in Si wafer direct bonding. The characteristics of bonded sample were measured under different bonding conditions of HF concentration, applied pressure and annealing temperature(200~ 100$0^{\circ}C$) after pre-bonding. The bonding strength was evaluated by tensile strength method. The bonded interface and the void were analyzed by using SEM and IR camera, respectively, Components existed in the interlayer were analyzed by using FT-IR. The bond strength depends on the HF pre-treatment condition before pre-bonding(Min 2.4kgf/$\textrm{cm}^2$~ Max : 14.kgf/$\textrm{cm}^2$)

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.3313-3315
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• 1999

Si direct bonding(SDB) technology is very attractive for both Si-on-insulator(SOI) electric devices and MEMS applications because of its stress free structure and stability. This paper presents on pre-bonding according to HF pre-treatment conditions in Si wafer direct bonding. The characteristics of bonded sample were measured under different bonding conditions of HF concentration, and applied pressure. The bonding strength was evaluated by tensile strength method. The bonded interface and the void were analyzed by using SEM and IR camera respectively. A bond characteristic on the interface was analyzed by using IT- IR. Si-F bonds on Si surface after HF pre-treatment are replaced by Si-OH during a DI water rinse. Consequently, hydrophobic wafer was bonded by hydrogen bonding of Si $OH{\cdots}(HOH{\cdots}HOH{\cdots}HOH){\cdots}OH-Si$. The bond strength depends on the HF pre-treatment condition before pre- bonding (Min:$2.4kgf/crn^2{\sim}Max:14.9kgf/crn^2$)