• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2163-2170
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• 2012

A signal receiving system can measure and analyze frequency, pulse modulation, scan modulation, frequency modulation on pulse, phase modulation on pulse of RF signal. A signal receiving system should be verified under simulated RF signal environment prior to verification on operation in fields. This paper describes an effective method to generate simulated RF signals with considering operational scenario. The simulated RF signal generator can be effectively used to evaluate the performance of the signal receiver and reduce the test cost of the signal receiver.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.7
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• pp.741-749
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• 2003

In this paper, we investigated the degree of compensation for WDM channel signal distortion due to chromatic dispersion, self phase modulation(SPM) and cross phase modulation(XPM). The considered system is 120 Gbps (3${\times}$40 Gbps) intensity modulation direct detection(IM/DD) WDM transmission system with path-averaged intensity approximation(PAIA) mid-span spectral inversion(MSSI) as compensation method. This system have highly nonlinear dispersion shifted fiber(HNL-DSF) as nonlinear medium in optical phase conjugator(OPC). We use 1 dB eye opening peralty(EOP) in order to evaluate the characteristics of compensation for distorted WDM channels. We confirmed that improvement of transmission distance and performance is achieved by MSSI method to distorted long-haul IM/DD WDM channels due to chromatic dispersion, SPM and XPM. And in the aspect of compensation for distorted pulse due to XPM, the MSSI method is effective to IM/DD WDM transmission system with high fiber dispersion coefficient.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.898-906
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• 2002

In this paper, we investigated the improvement degree of transmission distance of the various initial frequency chirped optical pulse with 5 dBm initial power dependence on the various bit rate and fiber dispersion coefficient, when MSSI(Mid-Span Spectral Inversion) with the optimal pump power condition is adopted for the compensation method for optical pulse distortion. And we analyzed the influence of mutual relation of optical pulse frequency chirp and Kerr effect on the MSSI methods for the long-haul optical transmission through the computer simulation. We found that the compensation degree of distorted optical pulse varies as a consequence of the variation of combined phase modulation of self phase modulation(Kerr effect) and initial frequency chirp parameter dependence on the fiber dispersion coefficient. And we found that, if the transmission bit rate is increased k times, the dispersion coefficient value of dispersion shift fiber is decreased $2^k$ times so as to be almost the same performance of the transmission system with k times lower bit rate.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.442-443
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• 2011

In this paper, a voltage control method based on DQ transformation and Space Vector Pulse Width Modulation (SVPWM) for a single phase three-level converter is proposed. This control method is designed to use DC values instead of using instantaneous values of current which are usually used in single-phase application, so that it results in a fast and robust voltage control response. Simulation results demonstrate the validity of the control strategies.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.7
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• pp.581-588
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• 2013

In the basic GMSK, the modulated signals are generated by the preprocessing of NRZ pulse trains with the gaussian low pass filter. In this paper, we proposed the GMSK modulation system with the delta pulse trains. The proposed system constructed with the gaussian pulse generator triggered by the bipolar delta pulse, the differentiator between $+T_b/2$ and $-T_b/2$, and then a matched filter for frequency-modulation function. The spectrum of proposed system was found to be smaller than about 35[%] at 40[dB] attenuated bandwidth, and the center spectrum to be lower than the basic GMSK with zero-crossing property.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.313-321
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• 2014

A low-power low-cost polar transmitter for EDGE is designed in $0.18{\mu}m$ CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode low-power frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.12
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• pp.813-820
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode converter is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode converter and guarantee zero-current-switching(ZCS) of the switch over the wide load range. The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. In addition, control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations and experiments.

• Proceedings of the KIEE Conference
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• 2008.11a
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• pp.65-67
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• 2008

A new pulse width modulation method based on predictive current control strategy is proposed to modulate matrix converters. The predictive current controller utilizes a discrete-time model to predict the future values of output currents and generates proper duty-ratios ta minimize the output current errors. The proposed method uses continuous carrier and establishes a predictive current controller to predetermine duty ratio signal for directly generating gating signals an thus is named "predictive current control PWM(PCCPWM)". The modulation algorithm nd the required equations are derived by using average concept over one switching period. Thus it can be easily extended to other matrix converter topologies, especially with neutral connections, such as sing le-phase ad two-phase matrix converters. The feasibility and validity of the proposed strategy are verified by computer simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.905-915
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• 2015

Two PWM techniques using space vector pulse-width modulation (SVPWM) are proposed for a two-phase permanent magnet synchronous motor (PMSM) driven by a two-phase eight-switch inverter. A two-phase motor with two symmetric stator windings is usually driven by a two-phase four-, six-, or eight-switch inverter. Compared with a four- and six-switch inverter, a two-phase eight-switch inverter can achieve larger power output. For two-phase motor drives, the SVPWM technique achieves more efficient DC bus voltage utilization and less harmonic distortion of the output voltage. For a two-phase PMSM fed by a two-phase eight-switch inverter under a normal SVPWM scheme, each of the eight PWM trigger signals for the inverter have to be changed twice in a cycle, causing a higher PWM frequency. Based on the normal SVPWM scheme, two effective SVPWM schemes are investigated in order to reduce the PWM frequency by rearranging four comparison values, while achieving the same function as the normal PWM scheme. A detailed explanation of the normal and two proposed SVPWM schemes is illustrated in the paper. The experimental results demonstrate that the proposed schemes achieve a better steady performance with lower switching losses compared with the normal scheme.