• Bulletin of the Korean Chemical Society
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• v.20 no.11
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• pp.1277-1280
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• 1999

An inexpensive ultrasonic nebulizer (USN) was developed utilizing a home humidifier. The ultrasonic transducer was taken from a commercial USN and the power supply was from a humidifier. Sample was continuously fed into the nebulizer and the detection limit was improved 3-20 times over a pneumatic nebulizer. Undesirably, noise in signal was also increased several times. 0.5 ppm of Mn was used as an internal reference and the "long-term" drift could be successfully corrected. Since the noise contained high and low frequency components, both could be effectively removed only by the real-time correction method such as the Myer-Tracy method, where the reference line was simultaneously monitored with the analytical lines. The performance of USN was tested with NIST SRMs and showed good agreement with the certified values.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.630-633
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• 2021

Microphones can convert received voice signals to electric signals. They have been widely used in various industries such as radios, smart devices and vehicles. Recently, the demands for small size and high sensitive microphones are increased according to the minimization of wireless earphone with the development of smart phone. A MEMS system is a good candidate for an ultra-small size microphone of a next generation and a read out IC for high sensitive MEMS sensor is researched from many industries and academies. Since the microphone system has a high sensitivity from environment noise and electric system noise, the system requires a low noise power supply and some low noise design techniques. In this paper, a low noise LDO is presented for small size MEMS microphone systems. The input supply voltage of the LDO is 1.5-3.6V, and the output voltage is 1.3V. Then, it can support to 5mA in the light load condition. The integrated output noise of proposed LDO form 20Hz to 20kHz is about 1.9uV. These post layout simulation results are performed with TSMC 0.18um CMOS technology and the size of layout is 325㎛ × 165㎛.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.1
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• pp.90-97
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• 2019

The charge redistribution digital-to-analog converter(CR-DAC) is often used for successive approximation register analog-to-digital converter(SAR ADC) that requiring low power consumption and small circuit area. However, CR-DAC is required 2 to the power of N unit capacitors to generate reference voltage for successive approximation of the N-bit SAR ADC, and many unit capacitors occupy large circuit area and consume more power. In order to improve this problem, this paper proposes SAR ADC using series capacitor DAC. The series capacitor DAC is required 2(1+N) unit capacitors to generate reference voltage for successive approximation and charges only two capacitors of the reference generation block. Because of these structural characteristics, the SAR ADC using series capacitor DAC can reduce the power consumption and circuit area. Proposed SAR ADC was designed in CMOS 180nm process, and at 1.8V supply voltage and 500kS/s sampling rate, proposed 6-bit SAR ADC have signal-to-noise and distortion ratio(SNDR) of 36.49dB, effective number of bits(ENOB) of 5.77-bit, power consumption of 294uW.

• Journal of IKEEE
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• v.19 no.1
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• pp.87-93
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• 2015

In this paper, a $145{\mu}W$, 87dB SNR, Low power 3rd order Sigma-Delta Modulator with Op-amp sharing is proposed. Conventional architecture with analog path and digital path is improved by adding a delayed feed -forward path for disadvantages that coefficient value of the first integrator is small. Proposed architecture has a larger coefficient value of the first integrator to remove the digital path. Power consumption of proposed architecture using op-amp sharing is lower than conventional architecture. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and sampling frequency 2.8224MHz shows SNR(Signal to Noise Ratio) of 87dB, the power consumption of $145{\mu}W$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.6-12
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• 2010

A sigma-delta modulator based class-D audio amplifier is presented. Parallel digital input is serialized to two-bit output by a fourth-order digital sigma-delta noise shaper. The output of the digital sigma-delta noise shaper is applied to a fourth-order analog sigma-delta modulator whose three-level output drives power switches. The pulse density modulated (PDM) output of the power switches is low-pass filtered by an LC-filter. The PDM output of the power switches is fed back to the input of the analog sigma-delta modulator. The first integrator of the analog sigma-delta modulator is a hybrid of continuous-time (CT) and switched-capacitor (SC) integrator. While the sampled input is applied to SC path, the continuous-time feedback signal is applied to CT path to suppress the noise of the PDM output. The class-D audio amplifier is fabricated in a standard $0.13-{\mu}m$ CMOS process and operates for the signal bandwidth from 100-Hz to 20-kHz. With 4-${\Omega}$ load, the maximum output power is 18.3-mW. The total harmonic distortion plus noise and dynamic range are 0.035-% and 80-dB, respectively. The modulator consumes 457-uW from 1.2-V power supply.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.12
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• pp.24-30
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• 1996

In this paper, we designed a new type of high frequency on-chip voltage controlled oscillator (VCO) using GaAs MESFET, and their performances were comapred with those of the conventional VCO. Each VCO was designed with three-to-five ring oscillator and inverter, buffer and NOR gate were implemented by GaAs source coupled FET logic, which has better speed and noise performance compared to other GaAs MESFET logic. SPICE simulation showed that the gain of conventional and our new VCO was 1.24[GHz/V], 0.54[GHz/V], respectively. The frquency tuning range were 2.31 to 3.55 [GHz] for conventional VCO and 2.47 to 3.01[GHz] for our new design. This shows that the factor of two gain reductin was achieved without too much sacrifice in the oscillation frequency. For our new VCO, the average temperature index was -2[MHz/.deg. C] in the range of -20~85[.deg. C] the power supply noise index was 5[MHz/%] for 5.3[V].+-.10[%] and total power consumption was 60.58[mW].

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.33-37
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• 2017

This paper suggests a new reliable push pull converter. The proposed push-pull converter have additional two diodes comparing with conventional push-pull converter. When one of two MOSFETs of the push-pull converter is on state, the other MOSFET is automatically off state due to adding additional diodes. Therefore, the converter is under electric noise environments, the converter avoids short circuit due to turning on of two MOSFETs. In this paper, the suggested converter has been simulated by PLECS software for 100 kHz switching frequency. In simulation, the current of the converter switches increases about 10 % for $20{\mu}sec$ electric noise environments. However, the converter operates very reliably without any short circuit conditions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.86-93
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• 2008

A low-power, low-noise, highly-linear hybrid balun circuit is proposed for 2.4-GHz fully differential CMOS direct conversion receivers. The hybrid balun is composed of a passive transformer and loss-compensating auxiliary amplifiers. Design issues regarding the optimal signal splitting and coupling between the transformer and compensating amplifiers are discussed. Implemented in $0.18{\mu}m$ CMOS process, the 2.4 GHz hybrid balun achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart and +23 dBm of IIP3 only at a current consumption of 0.67 mA from 1.2 V supply. It is also examined that the hybrid balun can remarkably lower the total noise figure of a 2.4 GHz fully differential RF receiver only at a cost of 0.82 mW additional power dissipation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.11
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• pp.1164-1171
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• 2014

Bulk Current Injection(BCI) test is a method of injecting current into Integrated Circuit(IC) using a current injection probe to qualify the standards of Electromagnetic Compatibility(EMC). This paper, we propose a microstrip coupler structure that can replace the BCI current injection probe that is used to inject a RF noise in standard IEC 62132-part 3 documented by International Electrotechnical Commission. Conventional high cost BCI probe has mostly been used in testing automotive ICs that use high supply voltage. We propose a compact microstrip coupler which is suitable for immunity testing of low power ICs. We tested its validity to replace the BCI injection probe from 100 MHz to 1,000 MHz. We compared the power[dBm] that is needed to generate the same level of noise between current injection probe and microstrip coupler by sweeping the frequency. Results show that microstrip coupler can inject the same level of noise into ICs for immunity test with less power.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.528-533
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• 2016

A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage $V_{reg}$ for the BG core and Op-Amp rather than the VDD. These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a $0.35{\mu}m$ CMOS technology. The BGR circuit occupies $0.024mm^2$ of the die area and consumes $200{\mu}W$ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 dB at frequencies up to 1 kHz and -55 dB at 1 MHz without additional circuits for the curvature compensation. A temperature coefficient of $60 ppm/^{\circ}C$ is obtained in the range of -40 to $120^{\circ}C$.