• 제목/요약/키워드: Poly-Si thin-film transistor

검색결과 122건 처리시간 0.024초

Formation of Buffer Layer on Mica for Application to Flexible Thin Film Transistors

  • Oh, Joon-Seok;Lee, Seung-Ryul;Lee, Jin-Ho;Ahn, Byung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.749-751
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    • 2007
  • A buffer layer consisting of $SiO_x/Ta/Ti$ has been developed in order to overcome the adhesion and stress problems between poly-Si film and mica. Polycrystalline silicon thin film transistor was successfully fabricated on the mica and transferred to a flexible plastic substrate.

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저온에서 제작된 고분자 기판 위의 poly-si TFT 제조 및 특성 (Fabrication and characteristics of low temperature poly-Si thin film transistor using Polymer Substrates)

  • 강수희;김영훈;한진우;서대식;한정인
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 학술대회 및 기술세미나 논문집 디스플레이 광소자
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    • pp.62-63
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    • 2006
  • In this paper, the characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated on polymer substrates are investigated. The a-Si films was laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated nMOS TFT showed field-effect mobility of $30cm2/V{\cdot}s$, on/off ratio of 105 and threshold voltage of 5 V.

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Development of a Low Temperature Doping Technique for Applications in Poly-Si TFT on Plastic Substrates

  • Hong, Wan-Shick;Kim, Jong-Man
    • Journal of Information Display
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    • 제4권3호
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    • pp.17-21
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    • 2003
  • A low temperature doping technique to be applied in poly-Si TFTs on plastic substrates was investigated. Heavily-doped amorphous silicon layers were deposited on poly-Si and the dopant atoms were driven in by subsequent excimer laser annealing. The entire process was carried out under a substrate temperature of 120 $^{\circ}C$, and a sheet resistance of as low as 300 ${\Omega}$/sq. was obtained.

몰리브덴 기판 위에 고온 결정화된 다결정 실리콘 박막 트랜지스터 특성에 관한 연구 (High Temperature Crystallized Poly-Si on the Molybdenum Substrate for Thin Film Transistor Applications)

  • 박중현;김도영;고재경;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.202-205
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    • 2002
  • Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

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NH3 Plasma Treatment를 사용한 고성능 TFT 제작 및 분석 (A Production and Analysis on High Quality of Thin Film Transistors Using NH3 Plasma Treatment)

  • 박희준;;이준신
    • 한국전기전자재료학회논문지
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    • 제30권8호
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    • pp.479-483
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    • 2017
  • The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

The Electrical Characteristics of Low-Temperature Poly-Si Thin-Film Transistors by Different Crystallization Methods

  • 김문수;장경수;이준신
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.287.1-287.1
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    • 2014
  • 본 연구에서는 현재 디스플레이에서 가장 널리 이용되는 저온 polycrystalline silicon (poly-Si)의 결정화 방법에 따른 thin-film transistor (TFT)의 전기적 특성을 분석하였다. 분석에 이용된 결정화 방식은 Excimer Laser Annealing (ELA)와 Metal Induced Crystallization (MIC)이다. ELA와 MIC TFTs의 전기적 특성 측정을 통한 분석결과 ELA와 MIC poly-Si TFTs의 전기적 특성 [field-effect mobility (${\mu}_{FE}$), on/off current ratio ($I_{ON}/I_{OFF}$), sub-threshold swing (SS)]은 큰 차이는 없지만, ELA를 이용한 poly-Si TFT의 전기적 특성이 조금 우수하다. 하지만, MIC poly-Si TFT의 경우 threshold voltage ($V_{TH}$)가 0V에 보다 가까울 뿐만 아니라, 전기적 스트레스를 통한 신뢰성 확인 시 ELA poly-Si TFT보다 조금 더 안정적이다. 이는 ELA의 경우 좁은 면에 선형 레이저 빔으로 조사하면서 생기는 hill-lock의 영향으로 표면이 거칠고 균일하지 못하여 바이어스 인가시 생기는 문제이다. 또한 MIC는 금속 촉매를 이용해 결정립 경계를 확장하고 결정 크기를 키워 대면적화에 유리하다. Thermal Stress에서는 (from 293K to 373K) TFT에 점차 높은 온도를 가하자 MIC poly-Si TFT의 경우 off 상태에서 누설 전류 값이 증가하며 열에 민감한 반응을 보이는 것을 확인하였다.

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SPICE를 사용한 다결정 실리콘 TFT-LCD 화소의 전기적 특성 시뮬레이션 방법의 체계화 (A Systematic Method for SPICE Simulation of Electrical Characteristics of Poly-Si TFT-LCD Pixel)

  • 손명식;유재일;심성륭;장진;유건호
    • 대한전자공학회논문지SD
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    • 제38권12호
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    • pp.25-35
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    • 2001
  • 복잡한 thin film transistor-liquid crystal display (TFT-LCD) array 회로의 전기적 특성을 분석하기 위해서는 PSPICE나 AIM-SPICE와 같은 회로 시뮬레이터를 사용하는 것이 필수적이다. 본 논문에서는 SPICE 시뮬레이션을 위한 다결정 실리콘 (poly-Si) TFT 소자의 입력 변수 추출을 체계화하는 방법을 도입한다. 이 방법을 excimer laser annealing 및 silicide mediated crystallization 방법으로 각각 제작된 다결정 실리콘 TFT 소자에 적용하여 실험 결과와 잘 일치하는 결과를 얻었다. SPICE 시뮬레이터 중에서 PSPICE는 graphic user interface(GUI) 방식의 편의성을 제공하므로 손쉽게 복잡한 회로를 구성할 수가 있다는 장점이 있으나, poly-Si TFT 소자 모델을 가지고 있지 않다. 이 연구에서는 PSPICE에 다결정 실리콘 TFT 소자 모델을 이식하고, TFT가 이식된 PSPICE를 사용하여 poly-Si TFT-LCD 단위 화소 및 라인 RC 지연을 고려한 화소에 대한 전기적 특성을 분석하였다. 이러한 결과는 TFT-LCD 어레이 특성 분석을 위한 시뮬레이션을 효율적으로 수행하는데 기여할 수 있을 것으로 기대된다.

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Properties of Thin Film a-Si:H and Poly-Si TFT's

  • 안병재;김도영;유진수;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.169-172
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    • 2000
  • A-Si:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly-Si films were achieved by various anneal techniques ; isothermal, RTA, and excimer laser anneal. The TFT on as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from $200^{\circ}C$ to $1000^{\circ}C$. The TFT on poly-Si showed an improved $I_{on}/I_{off}$ ratio of $10^6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly-Si TFTs.

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저온에서 제작된 다결정 실리콘 박막 트랜지스터의 수소화 효과에 대한 분석 (Analysis of hydrogenation effects on Low temperature Poly-Si Thin Film Transistor)

  • 최권영;김용상;이성규;전명철;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.1289-1291
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    • 1993
  • The hydrogenation effects on characteristics of polycrystalline silicon thin film transistors(poly-Si TFT's) of which the channel length varies from $2.5{\mu}m\;to\;20{\mu}m$ and poly-Si layer thickness is 50, 100, and 150 nm was investigated. After 1 hr hydrogenation annealing by PECVD, the threshold voltage shift decreased dependent on the channel length, but channel width may not alter the threshold voltage shift. In addition to channel length, the active poly-Si layer thickness may be an important parameter on hydrogenation effects, while gate poly-Si thickness may do not influence on the characteristics of TFT's. Considering our experimental results, we propose that channel length and active poly-Si layer thickness may be a key parameters of hydrogenation of poly-Si TFT's.

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Molybdenum 게이트를 적용한 저온 SLS 다결정 TFT′s 소자 제작과 특성분석에 관한 연구 (A Study on Low Temperature Sequential Lateral Solidification(SLS) Poly-Si Thin Film Transistors(TFT′s) with Molybdenum Gate)

  • 고영운;박정호;김동환;박원규
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권6호
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    • pp.235-240
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    • 2003
  • In this paper, we present the fabrication and the characteristic analysis of sequential lateral solidification(SLS) poly-Si thin film transistors(TFT's) with molybdenum gate for active matrix liquid displays (AMLCD's) pixel controlling devices. The molybdenum gate is applied for the purpose of low temperature processing. The maximum processing temperature is 55$0^{\circ}C$ at the dopant thermal annealing step. The SLS processed poly-Si film which is reduced grain and grain boundary effect, is applied for the purpose of electrical characteristics improvements of poly-Si TFT's. The fabricated low temperature SLS poly-Si TFT's had a varying the channel length and width from 10${\mu}{\textrm}{m}$ to 2${\mu}{\textrm}{m}$. And to analyze these devices, extract electrical characteristic parameters (field effect mobility, threshold voltage, subthreshold slope, on off current etc) from current-voltage transfer characteristics curve. The extract electrical characteristic of fabricated low temperature SLS poly-Si TFT's showed the mobility of 100~400cm$^2$/Vs, the off current of about 100pA, and the on/off current ratio of about $10^7$. Also, we observed that the change of grain boundary according to varying channel length is dominant for the change of electrical characteristics more than the change of grain boundary according to varying channel width. Hereby, we comprehend well the characteristics of SLS processed poly-Si TFT's witch is recrystallized to channel length direction.