• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1954-1956
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• 2005

본 논문에서는 SMPS(Switch-Mode Power Supply)의 역률을 개선할 수 있는 power factor correction(PFC) IC를 설계하였다. 설계된 PFC IC에는 전원장치의 power MOSFET을 구동할 수 있는 기능 이외에도 과전압, 과전류 및 단락보호 기능이 포함되어 있다. 또한 시스템이 대기상태에 있는 경우, 전압 및 전류 feedback 제어에 의해 효과적으로 대기전력을 절감할 수 있도록 설계하였다. 설계된 PFC IC는 시스템이 대기상태에서 일정시간동안 부하변동이 없을 경우 이를 감지하여 자동으로 시스템을 off 시켜 대기전력 소모를 최소화 하는 기능을 포함하고 있다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.60-67
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• 2010

We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.151-161
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• 2013

An active power factor correction (PFC) circuit is presented which employs a newly proposed input voltage sensor-less control technique operated in continuous conduction mode (CCM) and critical conduction mode (CRM). The conventional PFC circuit with input voltage sensor-less control technique degrades the power factor (PF) under the light load condition due to DCM operation. In the proposed PFC circuit, the switching frequency is basically 70KHz in CCM operation. In light load condition, however, the PFC circuit operates in CRM and the switching frequency is increased up to 200KHz. So CCM/CRM operation of the PFC circuit alleviates the decreasing of the PF in light load condition. The proposed PFC controller IC has been implemented in a $0.35{\mu}m$ BCDMOS process and a 240W PFC prototype is built. Experimental results shows the PF of the proposed PFC circuit is improved up to 10% from the one employing the conventional CCM/DCM dual mode control technique. Also, the PF is improved up to 4% in the light load condition of the IEC 61000-3-2 Class D specifications.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1387-1388
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• 2005

본 논문에서는 입력부에 LC 수동소자와 PFC IC를 각각 사용했을 경우의 1kW급 직류 전원장치에서의 동작 특성을 비교하고 있다.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1389-1391
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• 2005

본 논문은 시스템 파워 모듈에 적용하기 위해 CMOS 공정을 통해서 제작된 PFC IC와 성능 검증을 위한 1kW급 직류전원용 테스트베드의 개발에 대해서 기술하고 있다.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.233-236
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• 2002

The solution for PFC(Power Factor Correction), as a regulation in energy Policy, is becoming a hot Issue in every country because of the shortage of electrical energy. Therefore, a new improved idea for PFC problem has been introduced in this study. A lot of merits, effective cost by simple circuit, reduced PCB size, lighter than reactor in the view of weight, lower level of screen noise by leakage inductance in CTV applications, have been stated by comparing to the earlier method of using a Reactor. All test results in this statement were done by using a power device of STR-G9600 series based on the real load condition of color television. furthermore, the study shows that the test results also meets the IEC-1000-3-2 class D, which regulates the PFC when input power of a set is more than 75watts. More improved PFC in other applications hopes to be implemented by using the proposed method.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.1
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• pp.91-97
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• 2014

Recently, the LED(Light Emitting Diode) is expected to replace conventional lamps including incandescent, halogen and fluorescent lamps for some general illumination application, due to some obvious features such as high luminous efficiency, safety, long life, environment-friendly characteristics and so on. To drive the LED, a single stage PFC(Power Factor Correction) flyback converter has been adopted to satisfy the isolation, PFC and low cost. The conventional flyback LED driver has the serious disadvantage of high 120Hz output current ripple caused by the PFC operation. To overcome this drawback, a new PFC flyback with low 120Hz output current ripple is proposed in this paper. It is composed of 2 power stages, the DCM(Discontinuous Conduction Mode) flyback converter for PFC and BCM(Boundary Conduction Mode) boost converter for tightly regulated LED current. Since the link capacitor is located in the secondary side, its voltage stress is small. Moreover, since the driver is composed of 2 power stages, small output filter and link capacitor can be used. Especially, since the flyback is operated at DCM, the PFC can be automatically obtained and thus, an additional PFC IC is not necessary. Therefore, only one control IC for BCM boost converter is required. To confirm the validity of the proposed converter, theoretical analysis and experimental results from a prototype of 24W LED driver are presented.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.65 no.4
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• pp.303-308
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• 2016

A light-emitting diode (LED) has been increasingly applied to various industrial fields and general lightings because of its high efficiency, low power consumption, environment-friendly characteristic and long lifetime. To drive this LED lighting, various types of power converters have been applied. Also, power factor correction (PFC) techniques play an important role in the power supply technology. In this paper, design and control of a DCM interleaved boost PFC converter is discussed. The proposed converter can reduce current ripples at input and output side by cancelling an each phase of inductor currents. Since the IC does not require the auxiliary winding of inductor for current detection, simple PFC circuit is achieved. Therefore, it contributes to increase efficiency and downsize the whole system volume, cost. Also, the performance of the proposed system is demonstrated through experiments.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.207-209
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• 2018

본 논문은 고효율 및 고전력밀도 3-레벨 PFC(Power Factor Correction) 컨버터를 제안한다. 기존 PFC의 고 전력밀도를 위한 스위칭 주파수 상승은 스위칭 특성이 우수한 소자를 적용하거나, 별도의 스너버 회로가 요구되므로 설계가 복잡하며 고전력밀도 달성에 한계가 있다. 제안 PFC 컨버터는 3-레벨 방식을 적용하여 각 스위칭 소자의 전압 스트레스를 절반으로 감소시켰으며, 스위치 손실 저감을 통한 고속 스위칭 동작으로 리액티브 소자의 고밀도화를 달성하였다. 또한, 기존의 3-레벨방식은 디지털 제어를 통해 스위칭 소자의 전압 평형이 이루어졌지만, 본 논문에서는 아날로그 IC에 전압 평형을 위한 RC Delay 회로와 소수의 SMD(Surface-mount devices) 소자만을 이용하여 별도의 제어회로 없이 전압 평형이 가능하므로 고 전력밀도 달성에 유리하다. 제안회로의 타당성을 검증하기 위해 CRM(Critical conduction mode) PFC 컨버터를 기반으로 250W급 시작품 제작을 통한 실험 결과를 제시한다.

• KIPE Magazine
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• v.6 no.1
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• pp.37-40
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• 2001