• Title/Summary/Keyword: PFC(Power Factor Correction)

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A Voltage-fed Single-stage PFC Full-bridge Converter with Asymmetric Phase-shifted Control for Battery Chargers

  • Qian, Qinsong;Sun, Weifeng;Zhang, Taizhi;Lu, Shengli
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.31-40
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    • 2017
  • A novel voltage-fed single-stage power factor correction (PFC) full-bridge converter based on asymmetric phase-shifted control for battery chargers is proposed in this paper. The attractive feature of the proposed converter is that it can operate in a wide output voltage range without an output low-frequency ripple, which is indispensable in battery charger applications. Meanwhile, the converter can maintain a high power factor and a controllable dc bus voltage over a wide output voltage range. In this paper, the realization of PFC and the operation principle of asymmetric phase-shifted control are given. A small-signal analysis of the proposed single-stage power factor correction (PFC) full-bridge converter is performed. Experimental results obtained from a 1kW experimental prototype are given to validate the feasibility of the proposed converter. The PF is higher than 0.97 over the entire output voltage range with the proposed control strategy.

A Study on the PFC-Inverter with the ZVT-Switching Method (ZVT 스위칭 기법을 적용한 PFC-인버터)

  • 이성룡;전칠환;권순신
    • The Transactions of the Korean Institute of Power Electronics
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    • v.5 no.6
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    • pp.560-567
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    • 2000
  • A soft-switching PFC-Inverter for using AC motor drive such as the inverter air-conditioner with single phase medium size is proposed. In order to improve the power factor and the efficiency, in this paper, the ZVT topoloty in the conventional PFC-Inverter is adopted. So, the operation mode of the proposed ZVT PFC-Inverter is analyzed and the optimum circuit is designed. At last, the PSPICE, PSIM simulation and experiment results are presented in order to verify the validity of the proposed circuit.

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Bridgeless High Efficiency ZVZCS Power Factor Correction Circuit for PDP Power Module (PDP용 브리지가 없는 고효율 ZVZCS 역률개선회로)

  • Cho Kyu-Min;Yu Byung-Gyu;Moon Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.704-708
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    • 2004
  • Recently, many nation have released standard such as IEC 61000-3-2 and IEEE 59, which impose a limit on the harmonic current drawn by equipment connected to AC line in order to prevent the distortion of an AC Line. Therefore, Plasma Display Panel (PDP) which is highlightened in digital display device also has the Power Factor Correction (PFC) circuit to meet the harmonic requirements. In PDP power module, the conventional boost converter is usually used for the PFC circuit. However, it comes serious thermal problem on it's bridge diode due to heat of PDP, and therefore the system stability is not guaranteed. In this paper, the bridgeless boost converter, which is used for PFC circuit of the PDP power module, is designed and verified the possibility of the application in a practical product in a view of efficiency, component count, temperature and etc.

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A New Single-Stage PFC AC/DC Converter

  • Lee, Byoung-Hee;Kim, Chong-Eun;Park, Ki-Bum;Moon, Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.238-240
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    • 2007
  • A new ZVZCS Single-Stage Power-Factor-Correction(PFC) AC/DC converter with boost PFC cell is integrated with voltage doubler rectified asymmetrical half-bridge(VDRAHB) is proposed in this paper. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of link capacitor. An 85W prototype was implemented to show that it meets the harmonic requirements and standards satisfactorily with nearly unity power factor and high efficiency over universal input.

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Interleaved Boost-Flyback Converter with Boundary Conduction Mode for Power Factor Correction

  • Lin, Bor-Ren;Chien, Chih-Cheng
    • Journal of Power Electronics
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    • v.12 no.5
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    • pp.708-714
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    • 2012
  • This paper presents a new interleaved pulse-width modulation (PWM) boost-flyback converter to achieve power factor correction (PFC) and regulate DC bus voltage. The adopted boost-flyback converter has a high voltage conversion ratio to overcome the limit of conventional boost or buck-boost converter with narrow turn-off period. The proposed converter has wide turn-off period compared with a conventional boost converter. Thus, the higher output voltage can be achieved in the proposed converter. The interleaved PWM can further reduce the input and output ripple currents such that the sizes of inductor and capacitor are reduced. Since boundary conduction mode (BCM) is adopted to achieve power factor correction, power switches are turned on at zero current switching (ZCS) and switching losses are reduced. The circuit configuration, principle operation, system analysis, and design consideration of the proposed converter are presented in detail. Finally, experiments conducted on a laboratory prototype rated at 500W were presented to verify the effectiveness of the converter.

Modeling and Small-Signal Analysis of Controlled On-time Boost Power Factor Correction Circuit (도통 시간 제어형 승압형 역률보상회로의 모델링과 소신호 해석)

  • Park, Hyo-Gil;Hong, Seong-Su;Choe, Byeong-Jo
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.5
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    • pp.364-370
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    • 2000
  • A large-signal average model for the controlled on-time boost power factor correction(PFC) circuit is developed and subsequently linearized resulting in a small-signal model for the PFC circuit. Ac analyses are performed using the small-signal model, revealing new results new on small-signal dynamics of the PFC circuit. The analysis results and model predictions are confirmed with experimental measurements on 200W prototype PFC circuit.

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A Novel Bridgeless Interleaved Power Factor Correction Circuit with Single Current Sensor (단일 전류 센서를 이용하는 새로운 브리지 없는 인터리빙 방식의 역률 보상 회로)

  • Doan, Van-Tuan;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.363-364
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    • 2016
  • In this paper, a novel bridgeless interleaved power factor correction circuit with single current sensor is proposed. The proposed control strategy requires only one current sensor for the interleaved bridgeless PFC. By sampling the output current, all the boost indictor currents can be calculated and used to control the input current according to the input voltage. The reduced number of current sensors and associated feedback circuits helps reduce the cost of system. The problem caused by the unequal current gain between current sensors inherently does not exist in the proposed topology. Thus, current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. In addition, the proposed technique can be applied to the other kinds of interleaved PFC topologies. Performance of the proposed control strategy is verified by the experimental results with 6.6kW bridgeless interleaved PFC circuit.

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Improved Passive Power Factor Correction Circuits of Electronic Ballasts for fluorescent lamps (형광등용 전자식 안정기에 적합한 수동 역률개선회로의 제안 및 특성 개선에 관한 연구)

  • Chae, Gyun;Ryoo, Tae-Ha;Cho, Gyu-Hyeong
    • Proceedings of the KIEE Conference
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    • 1999.07f
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    • pp.2795-2797
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    • 1999
  • Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

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An Integrated Single-Stage Zero Current Switched Quasi-Resonant Power Factor Correction Converter with Active Clamp Circuit (능동 클램프 회로를 적용한 단상 ZCS 공진형 역률개선 컨버터)

  • 이준영;문건우;고관본;윤명중
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.626-630
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    • 1999
  • A new integrated single-stage zero current switched(ZCS) quasi-resonant converter (QRC) for the power factor correction(PFC) converter is introduced in this paper. The power factor correction can be achieved by the discontinuous conduction mode(DCM) operation of an input current. The proposed converter has the characteristics of the good power factor, low line current harmonics, and tight output regulation. Furthermore, the ringing effect due to the output capacitance of the main switch can be eliminated by use of active clamp circuit.

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Controls Methods Review of Single-Phase Boost PFC Converter : Average Current Mode Control, Predictive Current Mode Control, and Model Based Predictive Current Control

  • Hyeon-Joon Ko;Yeong-Jun Choi
    • Journal of the Korea Society of Computer and Information
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    • v.28 no.12
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    • pp.231-238
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    • 2023
  • For boost PFC (Power Factor Correction) converters, various control methods are being studied to achieve unity power factor and low THD (Total Harmonic Distortion) of AC input current. Among them, average current mode control, which controls the average value of the inductor current to follow the current reference, is the most widely used. However, nowadays, as advanced digital control becomes possible with the development of digital processors, predictive control of boost PFC converters is receiving attention. Predictive control is classified into predictive current mode control, which generates duty in advance using a predictive algorithm, and model predictive current control, which performs switching operations by selecting a cost function based on a model. Therefore, this paper simply explains the average current mode control, predictive current mode control, and model predictive current control of the boost PFC converter. In addition, current control under entire load and disturbance conditions is compared and analyzed through simulation.