• Proceedings of the Korean Vacuum Society Conference
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• 1996.06a
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• pp.40-41
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• 1996

Nitridation technique has been receiving much attention for the formation of a thin nitrided buffer layer on which high quality nitride films can be formedl. Particularly, gallium nitride (GaN) has been considered as a promising material for blue-and ultraviolet-emitting devices. It can also be used for in situ formed and stable passivation layers for selective growth of $GaAs_2$. In this work, formation of a thin nitrided layer is investigated. Nitrogen electron cyclotron resonance(ECR)-plasma is employed for the formation of thin nitrided layer. The plasma source used in this work is a compact ECR plasma gun3 which is specifically designed to enhance control, and to provide in-situ monitoring of plasma parameters during plasma-assisted processing. Microwave power of 100-200 W was used to excite the plasma which was emitted from an orifice of 25 rnm in diameter. The substrate were positioned 15 em away from the orifice of plasma source. Prior to nitridation is performed, the surface of n-type (001)GaAs was exposed to hydrogen plasma for 20 min at $300{\;}^{\circ}C$ in order to eliminate a native oxide formed on GaAs surface. Change from ring to streak in RHEED pattern can be obtained through the irradiation of hydrogen plasma, indicating a clean surface. Nitridation was carried out for 5-40 min at $RT-600{\;}^{\circ}C$ in a ECR plasma-assisted molecular beam epitaxy system. Typical chamber pressure was $7.5{\times}lO^{-4}$ Torr during the nitridations at $N_2$ flow rate of 10 seem.(omitted)mitted)

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.328-331
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• 1988

Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.17-19
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• 2004

The electrical properties of gate oxides grown in two different processes, which are in 10% nitrous oxide($N_2O$) and in dry oxygen, have been experimentally investigated and compared. It has been observed that the $SiC-SiO_2$ interface-trap density(Dit) measured in nitrided gate oxide has been tremendously reduced, compared to the density obtained from gate oxide grown in dry oxygen. The beneficial effects of nitridation on gate oxides also have been demonstrated in the values of total near interface-trap density and of forward-bias breakdown field. The reasons of these improvements have been explained.

• Journal of Surface Science and Engineering
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• v.42 no.1
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• pp.26-33
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• 2009

Recently ultra-supercritical steam power plants operate at $1000^{\circ}F$ ($538^{\circ}C$) and 3500 psi (24.1 MPa). Thermal efficiency of power plant will be increased about 2% if steam temperature increases from $1000^{\circ}F$ to $1150^{\circ}F$ ($621^{\circ}C$). In this study valve materials Incoloy901 (IC901) and Inconel718 (IN718) were nitrided to improve the surface hardness and solid lubrication function of the valve materials. The hardness of both IC901 and IN718 increased about two times by ion nitriding. IC901, IN718 and their nitrided specimens were corroded under ultra super-critical condition (USC) of $621^{\circ}C$. and 3600 psi (24.8 MPa) for 2000 hours. Oxidations of both IC901 and IN718 were very small due to the formation of protective oxide layer on the surface. But the corrosion resistance of both nitrided specimens decreased because of the formation of non-protective nitride layer of $Fe_{4}N$, $Fe_{2}N$ and CrN on the surface layer. The hardness of both nitrided IC901 and IN718 at $20{\mu}m$ depth from the surface decreased about 30% and 20% respectively by USC 2000 hours.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.8
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• pp.26-34
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• 1997

To develop ultrathin gate oxide for ULSI MOSFETs, for the first time, we fabricated MOS capacitors with 65.angs. thick initial oxide grown by high pressure oxidation (HIPOX) at 700.deg. C in 5 atmosphere $O_{2}$ ambient and then followed by rapid thermal nitridation (RTN) in N$_{2}$O ambient. The dielectric breakdown fields of the initial HIPOX oxide are 13.0 MV/cm and 13.8MV/cm for negative and positive gate bias, respectively and are dependent on nitridation temeprature and time.The lifetimes of the HIPOX oxides extractd by TDDB method are 1.1*10$^{8}$ sec and 3.4 * 10$^{9}$ sec for negative and positive stress current, respectively. The lifetime of the HIPOX oxide dfor negative stress current increases with nitridation time in N$_{2}$O ambient at 1100.deg.C, reaching maximum value stress curretn increases with nitridation time in N$_{2}$O ambient at 1100.deg. C reacing maximum value of 1.2*10$^{9}$ sec for 30 sec of nitridation time, and then subsequently decreases at the longer nitridation time. The lifetimes of the nitrided-HIPOX oxides are longer than 10 years when nitridations are carried out longer than about 50 sec and 12 sec at 1000.deg. C, and 1100.deg. C, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.1
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• pp.1-7
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• 2007

In this paper, two kinds of initial oxidation methods i.e., SLTO(Slow Low Temperature Oxidation: $700^{\circ}C$) and RTO(Rapid Thermal Oxidation: $850^{\circ}C$) are applied prior to the plasma nitridation for ultra thin oxide of RPNO (Remote Plasma Nitrided Oxide). It is observed that SLTO has superior characteristics to RTO such as lower SS(Sub-threshold Slope) and improved Ion-Ioff characteristics. Low frequency noise characteristics of SLTO also showed better than RTO both in linear and saturation regime. It is shown that flicker noise is dominated by carrier number fluctuation in the channel region. Therefore, SLTO is promising for nano-scale CMOS technology with ultra thin gate oxide.

• Journal of the Korean Ceramic Society
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• v.21 no.1
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• pp.33-40
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• 1984

To find out the optimum heating profile for the nitridation of compacts of graded silicon grains (max 53$mu extrm{m}$) two batches with the addition of MgO and $Mg(NO_3)_3$$cdot$$6H_2O$ to silicon particles were isostatically pressed into compacts. They were nitrided under some different nitriding schedules. The properties such as bulk densitis microstructures and formed phases were measured and observed. The following results were obtained ; 1) About 10% unreacted silicon remained in specimen which was nitrided at 1, 350$^{\circ}C$ for 240hrs. 2) One of the step-heating processes 1, 150$^{\circ}C$-1, 390$^{\circ}C$ for 65hrs are then $1, 390^{\circ}C$for 50hrs was the low temperature but with that at high temperature. 3) High pressure(10.5kgf/$cm^2$) of nitrogen at 1, 390$^{\circ}C$ accelerated the $\alpha$$ ightarrow$$\beta$ transformation of silicon nitride. 4) Magnesium nitrate was superior to magnesium oxide in the role of nitriding aid and the formation of uniform microstructures.

• Korean Journal of Materials Research
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• v.33 no.7
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• pp.309-314
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• 2023

This study aimed to address the limitations of traditional plasma nitriding methods by implementing a short-term plasma oxy-nitriding treatment on the surface of AISI 420 martensitic stainless steel. This treatment involved the sequential formation of nitride and oxide layers, to enhance surface hardness and corrosion resistance, respectively. The process resulted in the formation of a 20 ㎛-thick nitride layer and a 3 ㎛-thick oxide layer on the steel surface. Initially, the hardness increased by 2.2 times after nitriding, followed by a subsequent decrease of approximately 31 % after oxidation. While the nitriding process reduced corrosion resistance, the subsequent oxidation process led to the formation of a passive oxide film, effectively resolving this issue. The pitting corrosion of the oxide passive film started at 82.6 mVssc, providing better corrosion resistance characteristics than the nitride layer. Consequently, the trade-off between surface hardness and corrosion resistance in plasma oxy-nitrided AISI 420 martensitic stainless steel is anticipated to be recognized as an innovative and comprehensive surface treatment process for biomedical components.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.9
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• pp.736-742
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• 1991

N$^{+}$poly gate NMOSFETs and p$^{+}$ poly gate (surface type) PMOSFETs with three different gate oxides(SiO2, NO, and ONO) were fabricated. The rapid thermal nitridation and reoxidation techniques have been applied to gate oxide formation. The current drivability of the ONO NMOSFET shows larger values than that of the SiO2 NMOSFET. The snap-back occurs at a lower drain voltage for SiO$_2$ cases for ONO NMOSFET. Under the maximum substrate current bias conditions, hot-carrier effects inducting threshold voltage shift and transconductance degradation were investigated. The results indicate that ONO films exhibit less degradation in terms of threshold voltage shift. It was confirmed that the ONO samples achieve good improvement of hot-carrier immunity. In a SiO$_2$ SC-PMOSFET, with significant boron penetration, it becomes a depletion type (normally-on). But ONO films show excellent impurity barrier properties to boron penetration from the gate.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.6
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• pp.304-310
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• 2002

Novel charge trap type memory devices with reoxidized oxynitride gate dielectrics made by NO annealing and reoxidation process of initial oxide on substrate have been fabricated using 0.35 $\mu \textrm{m}$ retrograde twin well CMOS process. The feasibility for application as NVSM memory device and characteristics of traps have been investigated. For the fabrication of gate dielectric, initial oxide layer was grown by wet oxidation at $800^{\circ}C$ and it was reoxidized by wet oxidation at $800^{\circ}C$ after NO annealing to form the nitride layer for charge trap region for 30 minutes at $850^{\circ}C$. The programming conditions are possible in 11 V, 500 $\mu \textrm{s}$ for program and -13 V, 1ms for erase operation. The maximum memory window is 2.28 V. The retention is over 20 years in program state and about 28 hours in erase state, and the endurance is over $3 \times 10^3$P/E cycles. The lateral distributions of interface trap density and memory trap density have been determined by the single junction charge pumping technique. The maximum interface trap density and memory trap density are $4.5 \times 10^{10} \textrm{cm}^2$ and $3.7\times 10^{18}/\textrm{cm}^3$ respectively. After $10^3$ P/E cycles, interlace trap density increases to $2.3\times 10^{12} \textrm{cm}^2$ but memory charges decreases.