• Title/Summary/Keyword: Multiply paper

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Medical Image Encryption based on C-MLCA and 1D CAT (C-MLCA와 1차원 CAT를 이용한 의료 영상 암호화)

  • Jeong, Hyun-Soo;Cho, Sung-Jin;Kim, Seok-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.14 no.2
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    • pp.439-446
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    • 2019
  • In this paper, we propose a encryption method using C-MLCA and 1D CAT to secure medical image for efficiently. First, we generate a state transition matrix using a Wolfram rule and create a sequence of maximum length. By operating the complemented vector, it converts an existing sequence to a more complex sequence. Then, we multiply the two sequences by rows and columns to generate C-MLCA basis images of the original image size and go through a XOR operation. Finally, we will get the encrypted image to operate the 1D CAT basis function created by setting the gateway values and the image which is calculated by transform coefficients. By comparing the encrypted image with the original image, we evaluate to analyze the histogram and PSNR. Also, by analyzing NPCR and key space, we confirmed that the proposed encryption method has a high level of stability and security.

Development of Multiplier Operator for Input Signal Control of Electronic Circuits (전자회로의 입력신호 제어용 곱셈연산기 개발)

  • Kim, Jong-Ho;Chang, Hong-Ki;Kwon, Dae-Shik;Che, Gyu-Shik
    • Journal of Advanced Navigation Technology
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    • v.22 no.2
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    • pp.154-162
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    • 2018
  • The multiplier circuit is necessary to estimate degradation status of electronic cards in nuclear power plant, but its accuracy is not easy in processing those functions to multiply two input signals. What is important in multiplier circuit is that the multiplication result must be accurate and its linearity must be perfect. We developed and proposed excellent linearity multiplier circuit using operational amplifiers and transistor characteristics, and then proved its validity in this paper. We have made efforts to eliminate nonlinearity components of semiconductors with this circuit in order to ensure excellent linearity of developed multiplier circuit. We conducted multiplication operations through simulation, applying adequate values to each component in order to verify the circuit composed of that method. We showed step-by-step output signals, and then compared the logical analyses and measuring results as simulation results. We confirmed that this method is superior to existing multiplication or linearity.

An Algorithm For Reducing Round Bound of Parallel Exponentiation (병렬 지수승에서 라운드 수 축소를 위한 알고리즘)

  • 김윤정
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.14 no.1
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    • pp.113-119
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    • 2004
  • Exponentiation is widely used in practical applications related with cryptography, and as the discrete log is easily solved in case of a low exponent n, a large exponent n is needed for a more secure system. However. since the time complexity for exponentiation algorithm increases in proportion to the n figure, the development of an exponentiation algorithm that can quickly process the results is becoming a crucial problem. In this paper, we propose a parallel exponentiation algorithm which can reduce the number of rounds with a fixed number of processors, where the field elements are in GF($2^m$), and also analyzed the round bound of the proposed algorithm. The proposed method uses window method which divides the exponent in a particular bit length and make idle processors in window value computation phase to multiply some terms of windows where the values are already computed. By this way. the proposed method has improved round bound.

A Study on the Multiplexing of a Communication Line for the Physical Load Balancing-Based Prevention of Infringement (물리적 부하 균형(Load-balancing) 기반의 침해방지를 위한 통신라인 다중화에 관한 연구)

  • Choi, Hee-Sik;Seo, Woo-Seok;Jun, Moon-Seog
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.22 no.1
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    • pp.81-91
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    • 2012
  • Presently in 2011, there are countless attacking tools oriented to invading security on the internet. And most of the tools are possible to conduct the actual invasion. Also, as the program sources attacking the weaknesses of PS3 were released in 2010 and also various sources for attacking agents and attacking tools such as Stuxnet Source Code were released in 2011, the part for defense has the greatest burden; however, it can be also a chance for the defensive part to suggest and develop methods to defense identical or similar patterned attacking by analyzing attacking sources. As a way to cope with such attacking, this study divides the network areas targeted for attack based on load balancing by the approach gateways and communication lines according to the defensive policies by attacking types and also suggests methods to multiply communication lines. The result of this paper will be provided as practical data to realize defensive policies based on high hardware performances through enhancing the price competitiveness of hardware infrastructure with 2010 as a start.

Low Space Complexity Bit-Parallel Shifted Polynomial Basis Multipliers using Irreducible Trinomials (삼항 기약다항식 기반의 저면적 Shifted Polynomial Basis 비트-병렬 곱셈기)

  • Chang, Nam-Su;Kim, Chang-Han
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.20 no.5
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    • pp.11-22
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    • 2010
  • Recently, Fan and Dai introduced a Shifted Polynomial Basis and construct a non-pipeline bit-parallel multiplier for $F_{2^n}$. As the name implies, the SPB is obtained by multiplying the polynomial basis 1, ${\alpha}$, ${\cdots}$, ${\alpha}^{n-1}$ by ${\alpha}^{-\upsilon}$. Therefore, it is easy to transform the elements PB and SPB representations. After, based on the Modified Shifted Polynomial Basis(MSPB), SPB bit-parallel Mastrovito type I and type II multipliers for all irreducible trinomials are presented. In this paper, we present a bit-parallel architecture to multiply in SPB. This multiplier have a space complexity efficient than all previously presented architecture when n ${\neq}$ 2k. The proposed multiplier has more efficient space complexity than the best-result when 1 ${\leq}$ k ${\leq}$ (n+1)/3. Also, when (n+2)/3 ${\leq}$ k < n/2 the proposed multiplier has more efficient space complexity than the best-result except for some cases.

Two-Way Hybrid Power-Line and Wireless Amplify-and-Forward Relay Communication Systems

  • Asiedu, Derek Kwaku Pobi;Ahiadormey, Roger Kwao;Shin, Suho;Lee, Kyoung-Jae
    • Journal of Advanced Information Technology and Convergence
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    • v.9 no.1
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    • pp.25-37
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    • 2019
  • Power-line communication (PLC) has influenced smart grid development. In addition, PLC has also been instrumental in current research on internet-of-things (IoT). Due to the implementation of PLC in smart grid and IoT environments, strides have been made in PLC and its combination with the wireless system to form a hybrid communication system. Also, PLC has evolved from a single-input-single-output (SISO) configuration to multiple-input-multiple-output (MIMO) configuration system, and from a point-to-point communication system to cooperative communication systems. In this work, we extend a MIMO wireless two-way amplify-and-forward (AF) cooperative communication system to a hybrid PLC and wireless (PLC/W) system configuration. We then maximize the weighted sum-rate for the hybrid PLC/W by optimizing the precoders at each node within the hybrid PLC/W system. The sum-rate problem was found to be non-convex, therefore, an iterative algorithm is used to find the optimal precoders that locally maximize the system sum-rate. For our simulation results, we compare our proposed hybrid PLC/W configuration to a PLC only and wireless only configuration at each node. Due to an improvement in system diversity, the hybrid PLC/W configuration outperformed the PLC only and wireless only system configurations in all simulation results presented in this paper.

Southeast Asian Studies: Insiders and Outsiders, or is Culture and Identity a Way Forward?

  • King, Victor T.
    • SUVANNABHUMI
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    • v.8 no.1
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    • pp.17-53
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    • 2016
  • Debates continue to multiply on the definition and rationale of Southeast Asia as a region and on the utility of the multidisciplinary field of area studies. However, we have now entered a post-colonialist, post-Orientalist, post-structuralist stage of reflection and re-orientation in the era of globalization, and a strong tendency on the part of insiders to pose these issues in terms of an insider-outsider dichotomy. On the one hand, the study of Southeast Asia for researchers from outside the region has become fragmented. This is for very obvious reasons: the strengthening and re-energizing of academic disciplines, the increasing popularity of other non-regional multidisciplinary studies, and the entry of globalization studies into our field of vision. On the other hand, how has the local Southeast Asian academy addressed these major issues of change in conceptualizing the region from an insider perspective? In filling in and giving substance to an outsider, primarily Euro-American-Australian-centric definition and vision of Southeast Asia, some local academics have recently been inclined to construct Southeast Asia in terms of the Association of Southeast Asian Nations (ASEAN): a nation-state-based, institutional definition of what a region comprises. Others continue to operate at a localized level exploring small-scale communities and territories, while a modest number focus on sub-regional issues (the Malay-Indonesian world or the Mekong sub-region are examples). However, further reflections suggest that the Euro-American-Australian hegemony is a thing of the past and the ground has shifted to a much greater emphasis on academic activity within the region. Southeast Asia-based academics are also finding it much more important to network within the region and to capture, understand, and analyze what Chinese, Japanese, and Korean scholars are saying about Southeast Asia, its present circumstances and trajectories, and their increasingly close involvement with the region within a greater Asia-Pacific rim. The paper argues that the insider-outsider dichotomy requires considerable qualification. It is a neat way of dramatizing the aftermath of colonialism and Orientalism and of reasserting local priorities, agendas, and interests. But there might be a way forward in resolving at least some of these apparently opposed positions with recourse to the concepts of culture and identity in order to address Southeast Asian diversities, movements, encounters, hybridization, and hierarchies.

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An Exact Division Algorithm for Change-Making Problem (거스름돈 만들기 문제의 정확한 나눗셈 알고리즘)

  • Lee, Sang-Un
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.3
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    • pp.185-191
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    • 2022
  • This paper proposed a division algorithm of performance complexity $O{\frac{n(n+1)}{2}}$ for a change-making problem(CMP) in which polynomial time algorithms are not known as NP-hard problem. CMP seeks to minimize the sum of the xj number of coins exchanged when a given amount of money C is exchanged for cj,j=1,2,⋯,n coins. Known polynomial algorithms for CMPs are greedy algorithms(GA), divide-and-conquer (DC), and dynamic programming(DP). The optimal solution can be obtained by DP of O(nC), and in general, when given C>2n, the performance complexity tends to increase exponentially, so it cannot be called a polynomial algorithm. This paper proposes a simple algorithm that calculates quotient by dividing upper triangular matrices and main diagonal for k×n matrices in which only j columns are placed in descending order of cj of n for cj ≤ C and i rows are placed k excluding all the dividers in cj. The application of the proposed algorithm to 39 benchmarking experimental data of various types showed that the optimal solution could be obtained quickly and accurately with only a calculator.

Digital Image Watermarking Technique using Scrambled Binary Phase Computer Generated Hologram in Discrete Cosine Transform Domain (DCT영역에서 스크램블된 이진 위상 컴퓨터형성홀로그램을 이용한 디지털 영상 워터마킹 기술)

  • Kim, Cheol-Su
    • Journal of Korea Multimedia Society
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    • v.14 no.3
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    • pp.403-413
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    • 2011
  • In this paper, we proposed a digital image watermarking technique using scrambled binary phase computer generated hologram in the discrete cosine transform(DCT) domain. For the embedding process of watermark. Using simulated annealing algorithm, we would generate a binary phase computer generated hologram(BPCGH) which can reconstruct hidden image perfectly instead of hidden image and encrypt it through the scramble operation. We multiply the encrypted watermark by the weight function and embed it into the DC coefficients in the DCT domain of host image and an inverse DCT is performed. For the extracting process of watermark, we compare the DC coefficients of watermarked image and original host image in the DCT domain and dividing it by the weight function and decrypt it using descramble operation. And we recover the hidden image by inverse Fourier transforming the decrypted watermark. Finally, we compute the correlation between the original hidden image and recovered hidden image to determine if a watermark exits in the host image. The proposed watermarking technique use the hologram information of hidden image which consist of binary values and scramble encryption technique so it is very secure and robust to the various external attacks such as compression, noises and cropping. We confirmed the advantages of the proposed watermarking technique through the computer simulations.

A Study on Improvement of Run-Time in KS-SIGNAL, Traffic Signal Optimization Model for Coordinated Arterials (간선도로 연동화 신호최적화 모형 KS-SIGNAL의 수행속도 향상을 위한 연구)

  • 박찬호;김영찬
    • Journal of Korean Society of Transportation
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    • v.18 no.4
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    • pp.7-18
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    • 2000
  • KS-SIGNAL, a traffic signal optimization model for coordinated arterials, is an optimization model using the mixed integer linear Programming that minimizes total delay on arterials by optimizing left-turn Phase sequences. However, the Previous version of KS-SIGNAL had a difficulty in reducing computation speed because the related variables and constraints multiply rapidly in accordance with the increase of intersections. This study is designed to propose a new model, improving optimizing computation speed in KS-SIGMAl, and evaluate it. This Paper Puts forth three kinds of methodological approaches as to achieve the above goals. At the first step to reduce run-time in the proposed model objective function and a few constraints are Partially modified, which replaces variable in related to queue clearance time with constant, by using thru-movements at upstream intersection and the length of red time at downstream intersection. The result shows that the run-time can be reduced up to 70% at this step. The second step to load the library in LINDO for Windows, in order to solve mixed integer linear programming. The result suggests that run-time can be reduced obviously up to 99% of the first step result. The third step is to add constraints in related to left-turn Phase sequences. The proposed methodological approach, not optimizing all kinds of left-turn sequences, is more reasonable than that of previous model , only in the view of reducing run-tim. In conclusion, run-time could be reduced up to 30% compared with the second results. This Proposed model was tested by several optimization scenarios. The results in this study reveals that signal timing plan in KS-SIGNAL is closer to PASSER-II (bandwidth maximizing model) rather than to TRANSYT-7F(delay minimizing model).

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