• Title/Summary/Keyword: Mask design

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Literacture Review of Dental Infection Control in Korea(1988~2009) (치과 감염 관리에 관한 국내 문헌고찰(1988~2009년))

  • Choi, Ha-Na;Bae, Hyun-Sook;Cho, Young-Sik
    • Journal of dental hygiene science
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    • v.10 no.4
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    • pp.199-209
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    • 2010
  • The purpose of this paper is to suggest fundamental data for finding problems and ways to improve Korean dental infection control studies through the classification of literature on dental infection control which have been conducted in Korea. The collection of literature was done via seven online database programs only for domestic literature. The date of first search was September 16-17th, 2009, and the final search was completed on December 20th, 2009. (1) From the examination of the frequency of research according to the publishing form by year, it is revealed that after 2006, dental infection control is being performed most vigorously, compared with 1980's when the studied on this area started. (2) According to the classification of research method by research design of original article among the literature, original articles were 45 studies, and the others were 20 studies. It was also found that in 45 studies of original article, there were 37 studies of survey research, and there were 8 studies which include microbiology examination. (3) On the analysis of the subject of each study, glob and mask using rate have gradually increased, and the frequency of pierced with sharp implement or needle have gradually decreased. Through this research, it can be observed roughly how the results depended on subject of each studies change. However, it may be restricted to generalize the results of this research, because there are lack of clear standard and literature evidence to assess the interrelationship between each study. Also, since there are shortage of research and studies in dental infection control, the research to examine the effects should be tried actively after the standards and precaution of dental infection control developed.

Dynamic Analysis and Evaluation of a Microgyroscope using Symmetric 2DOF Planar Resonator (대칭형 2자유도 수평 공진기를 이용한 마이크로 자이로스코프의 동특성 해석 및 평가)

  • Hong, Yoon-Shik;Lee, Jong-Hyun;Kim, Soo-Hyun
    • Journal of Sensor Science and Technology
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    • v.10 no.1
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    • pp.1-8
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    • 2001
  • Conventional microgyroscopes of vibrating type require resonant frequency tuning of the driving and sensing modes to achieve high sensitivity. These tuning conditions depend on each fabricated microgyroscopes, even though the microgyroscopes are identically designed. A new micromachined resonator, which is applicable to microgyroscopes with self-toning characteristics, is presented. Since the laterally driven two degrees of freedom (2DOF) resonator was designed as a symmetric structure with identical stiffness in two orthogonal axes, the resonator is applicable to vibrating microgyroscopes, which do not need mode tuning. A dynamic model of the resonator was derived considering gyroscopic application. The dynamic model was evaluated by experimental comparison with fabricated resonators. The microgyroscopes were fabricated using a simple 2-mask-process of a single polysilicon layer deposited on an insulator layer. The feasibility of the resonator as a vibrating microgyroscopes with self-tuning capability is discussed. The fabricated resonators of a particular design have process-induced non-uniformities that cause different resonant frequencies. For several resonators, the standard deviations of the driving and sensing frequencies were as high as 1232Hz and 1214Hz, whereas the experimental average detuning frequency was 91.75Hz. The minimum detuned frequency was 68Hz with $0.034mVsec/^{\circ}$ sensitivity. The sensitivity of the microgyroscopes was low due to process-induced non-uniformity; the angular rate bandwidth, however, was wide. This resonator could be successfully applicable to a vibrating microgyroscopes with high sensitivity, if improvements in uniformity of the fabrication process are achieved. Further developments in improved integrated circuits are expected to lower the noise level even more.

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Design of MTP memory IP using vertical PIP capacitor (Vertical PIP 커패시터를 이용한 MTP 메모리 IP 설계)

  • Kim, Young-Hee;Cha, Jae-Han;Jin, Hongzhou;Lee, Do-Gyu;Ha, Pan-Bong;Park, Mu-Hun
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.48-57
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    • 2020
  • MCU used in applications such as wireless chargers and USB type-C require MTP memory with a small cell size and a small additional process mask. Conventional double poly EEPROM cells are small in size, but additional processing masks of about 3 to 5 sheets are required, and FN tunneling type single poly EEPROM cells have a large cell size. In this paper, a 110nm MTP cell using a vertical PIP capacitor is proposed. The erase operation of the proposed MTP cell uses FN tunneling between FG and EG, and the program operation uses CHEI injection method, which reduces the MTP cell size to 1.09㎛2 by sharing the PW of the MTP cell array. Meanwhile, MTP memory IP required for applications such as USB type-C needs to operate over a wide voltage range of 2.5V to 5.5V. However, the pumping current of the VPP charge pump is the lowest when the VCC voltage is the minimum 2.5V, while the ripple voltage is large when the VCC voltage is 5.5V. Therefore, in this paper, the VPP ripple voltage is reduced to within 0.19V through SPICE simulation because the pumping current is suppressed to 474.6㎂ even when VCC is increased by controlling the number of charge pumps turned on by using the VCC detector circuit.

Design of PMOS-Diode Type eFuse OTP Memory IP (PMOS-다이오드 형태의 eFuse OTP IP 설계)

  • Kim, Young-Hee;Jin, Hongzhou;Ha, Yoon-Gyu;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.64-71
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    • 2020
  • eFuse OTP memory IP is required to trim the analog circuit of the gate driving chip of the power semiconductor device. Conventional NMOS diode-type eFuse OTP memory cells have a small cell size, but require one more deep N-well (DNW) mask. In this paper, we propose a small PMOS-diode type eFuse OTP memory cell without the need for additional processing in the CMOS process. The proposed PMOS-diode type eFuse OTP memory cell is composed of a PMOS transistor formed in the N-WELL and an eFuse link, which is a memory element and uses a pn junction diode parasitic in the PMOS transistor. A core driving circuit for driving the array of PMOS diode-type eFuse memory cells is proposed, and the SPICE simulation results show that the proposed core circuit can be used to sense post-program resistance of 61㏀. The layout sizes of PMOS-diode type eFuse OTP memory cell and 512b eFuse OTP memory IP designed using 0.13㎛ BCD process are 3.475㎛ × 4.21㎛ (= 14.62975㎛2) and 119.315㎛ × 341.95㎛ (= 0.0408mm2), respectively. After testing at the wafer level, it was confirmed that it was normally programmed.

Design of an Visitor Identification system for the Front Door of an Apartment using Deep learning (딥러닝 기반 이용한 공동주택현관문의 출입자 식별 시스템 설계)

  • Lee, Min-Hye;Mun, Hyung-Jin
    • Journal of the Korea Convergence Society
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    • v.13 no.4
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    • pp.45-51
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    • 2022
  • Fear of contact exists due to the prevention of the spread of infectious diseases such as COVID-19. When using the common entrance door of an apartment, access is possible only if the resident enters a password or obtains the resident's permission. There is the inconvenience of having to manually enter the number and password for the common entrance door to enter. Also, contactless entry is required due to COVID-19. Due to the development of ICT, users can be easily identified through the development of face recognition and voice recognition technology. The proposed method detects a visitor's face through a CCTV or camera attached to the common entrance door, recognizes the face, and identifies it as a registered resident. Then, based on the registered information of the resident, it is possible to operate without contact by interworking with the elevator on the server. In particular, if face recognition fails with a hat or mask, the visitor is identified by voice or additional authentication of the visitor is performed based on the voice message. It is possible to block the spread of contagiousness without leaving any contactless function and fingerprint information when entering and exiting the front door of an apartment house, and without the inconvenience of access.

Design of eFuse OTP IP for Illumination Sensors Using Single Devices (Single Device를 사용한 조도센서용 eFuse OTP IP 설계)

  • Souad, Echikh;Jin, Hongzhou;Kim, DoHoon;Kwon, SoonWoo;Ha, PanBong;Kim, YoungHee
    • Journal of IKEEE
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    • v.26 no.3
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    • pp.422-429
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    • 2022
  • A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

Optimized Hardware Design using Sobel and Median Filters for Lane Detection

  • Lee, Chang-Yong;Kim, Young-Hyung;Lee, Yong-Hwan
    • Journal of Advanced Information Technology and Convergence
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    • v.9 no.1
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    • pp.115-125
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    • 2019
  • In this paper, the image is received from the camera and the lane is sensed. There are various ways to detect lanes. Generally, the method of detecting edges uses a lot of the Sobel edge detection and the Canny edge detection. The minimum use of multiplication and division is used when designing for the hardware configuration. The images are tested using a black box image mounted on the vehicle. Because the top of the image of the used the black box is mostly background, the calculation process is excluded. Also, to speed up, YCbCr is calculated from the image and only the data for the desired color, white and yellow lane, is obtained to detect the lane. The median filter is used to remove noise from images. Intermediate filters excel at noise rejection, but they generally take a long time to compare all values. In this paper, by using addition, the time can be shortened by obtaining and using the result value of the median filter. In case of the Sobel edge detection, the speed is faster and noise sensitive compared to the Canny edge detection. These shortcomings are constructed using complementary algorithms. It also organizes and processes data into parallel processing pipelines. To reduce the size of memory, the system does not use memory to store all data at each step, but stores it using four line buffers. Three line buffers perform mask operations, and one line buffer stores new data at the same time as the operation. Through this work, memory can use six times faster the processing speed and about 33% greater quantity than other methods presented in this paper. The target operating frequency is designed so that the system operates at 50MHz. It is possible to use 2157fps for the images of 640by360 size based on the target operating frequency, 540fps for the HD images and 240fps for the Full HD images, which can be used for most images with 30fps as well as 60fps for the images with 60fps. The maximum operating frequency can be used for larger amounts of the frame processing.

Position Uncertainty due to Multi-scattering in the Scintillator Array of Dual Collimation Camera (복합 집속 카메라의 섬광체배열에서 다중산란에 의한 위치 불확실성)

  • Lee, Won-Ho
    • Journal of radiological science and technology
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    • v.31 no.3
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    • pp.287-292
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    • 2008
  • Position information of radiation interactions in detection material is essential to reconstruct a radiation source image. With most position sensing techniques, the position information of a single interaction inside the detectors can be precisely obtained. Each interaction position of multi-scattering inside scintillators, however, can not be individually measured and only the average of the scattering positions can be obtained, which causes the uncertainty in the measured interaction position. In this paper, the position uncertainties due to the multi-scattering were calculated by Monte Carlo simulation. The simulation model was a 50 by 50 by 5 mm $LaCl_3$(Ce) scintillator(pixel size is 2 by 2 by 5mm) which was utilized for the dual collimation camera. The dual collimation camera uses the information from both photoelectric effect and Compton scattering, and therefore, position uncertainties for both partial and full energy deposition of radiation interactions are calculated. In the case of partial energy deposition(PED), the standard deviations of positions are less than $1{\sim}2mm$, which means the uncertainty caused by multi-scattering is not significant. Because the effect of the multi-scattering with PED is insignificant, the multi-scattering has little effect on the performance of Compton imaging of dual collimation camera. In the case of full energy deposition(FED), however, the standard deviation of the positions is about twice that of the pixel size of the 1stdetector, except for 122keV incident radiations. Therefore, the standard deviations caused by multi-scatterings should be considered in the design of the coded mask of the dual collimation camera to avoid artifact on the reconstructed image. The position uncertainties of the FEDs are much larger than those of the PEDs for all radiation energies and the ratio of PEDs to FEDs increases when the incident radiation energy increases. The position uncertainties of both PEDs and FEDs are dependent on the incident radiation energy.

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A Survey on the Workplace Environment and Personal Protective Equipment of Poultry Farmers (양계 농업인의 작업장 환경 및 개인보호구 착용 실태조사)

  • Kim, Insoo;Kim, Kyung-Ran;Lee, Kyung-Suk;Chae, Hye-Seon;Kim, Sungwoo
    • Journal of Environmental Health Sciences
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    • v.40 no.6
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    • pp.454-468
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    • 2014
  • Objectives: This study was conducted to investigate the actual condition of the farm work environment and personal protective equipment as part of the effort to improve livestock work for the safety and health of poultry farmers and provide basic data for establishing plans to improve and develop personal protective equipment. Methods: For this purpose, a questionnaire survey on general information about stables, the poultry work environment, accidents, the wearing of work clothes and personal protective equipment, and the level of awareness related to personal protective equipment was conducted among 148 poultry farmers. Results: As a result, it was found that poultry workplace environment was exposed to such risks as fine dusts; organic dusts; poisonous gases; odorous substances; chicken excrement; contact with chickens, bacteria or viruses; and accidents related to machine operation. Thirteen percent of respondents suffered severe respiratory diseases, and the most frequently injured sites due to accidents were the hands (25.7%), knees (23.8%), arms (17.3%), and head (10.9%). The most frequent type of accident was collisions between the body and obstacles or machinery during movement (36.4%), followed by erroneous machine operation such as feeders and electric shocks (8.5%). Regarding the wearing of work clothes and personal protective equipment, 51.7% of the respondents wore worn-out clothing or everyday clothes, whereas only 32.0% wore work clothes. The percentage of farmers who wore proper protective equipment for the work environment during poultry work was 48.4%. The most frequently used type of protective equipment was boots (38.9%), followed by mask (36.7%), gloves (36.3%), appropriate work clothes (22.6%), quarantine clothes (17.6%), helmets (13.4%), and goggles (12.6%). The rate of wearing goggles was low because they were considered inconvenient and lowered work efficiency. Furthermore, they purchased everyday products available on the market for their personal protective equipment which were not appropriate for maintaining safety in an actual harmful environment and its consequent risks. As a result of the survey of the awareness level related to personal protective equipment, their levels of awareness of accidents and attitude proved to be average or higher, but the practice of wearing protective equipment and the level of knowledge and management of personal protective equipment were lower. Conclusion: This survey found that the wearing status of personal protective equipment among poultry farmers was insufficient even though they were exposed to risks. Most respondents were aware of the necessity of wearing personal protective equipment and of the potential for accidents, but they did not wear proper protective equipment. Their wearing rate was low due to a lack of knowledge about protective equipment, as well as the inconvenience of wearing it. Therefore there is a need to improve and develop specialized personal protective equipment for respiration, hands, and eyes, as well as work clothes that can protect farmers from major harmful matter that is generated in the poultry workplace. Based on the results of this investigation, we will conduct further studies on the required performance and design directions of personal protective equipment while collecting more objective data through field-oriented assessments.

Analysis of the Effect of the Etching Process and Ion Injection Process in the Unit Process for the Development of High Voltage Power Semiconductor Devices (고전압 전력반도체 소자 개발을 위한 단위공정에서 식각공정과 이온주입공정의 영향 분석)

  • Gyu Cheol Choi;KyungBeom Kim;Bonghwan Kim;Jong Min Kim;SangMok Chang
    • Clean Technology
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    • v.29 no.4
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    • pp.255-261
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    • 2023
  • Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.