• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.7
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• pp.963-968
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• 2013

Ionizing Radiation effects on MOS devices provide useful information regarding the behavior of MOS based devices and circuits in the electronic instrumentation parts and instructive data for making the high sensitive sensors. The study presents the results of the analysis on the structural characteristics of MOS capacitor for sensing the ionizing radiation effect. We performed numerical modeling of Ionizing-radiation effect on MOS capacitor and simulation using Matlab program. Also we produced MOS capacitors and obtained useful data through radiation experiment to analyse the characteristic of ionizing radiation effect on MOS capacitor. Increasing the thickness of MOS capacitor's oxide layer enhanced the sensitivity of MOS capacitor under irradiation condition, but the sensitivity of irradiated MOS capacitor is uninfluenced by the area of MOS capacitor. The high frequency capacitance of the MOS capacitor is found to be strongly affected by incident ionizing radiation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.2
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• pp.297-305
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• 2000

It is observed that the initial properties and degradation characteristics on plasma of n/p-MOSFET with polycide and poly-Si as different gate materials under F-N stress and hot electron stress are affected by metal AR(Antenna Ratio) during plasma process. Compared to that of MOS devices with poly-Si gate material, reliability properties on plasma of MOS devices with polycide gate material are improved. This can be explained by that fluorine of tungsten polycide process diffuses through poly-Si into gate oxide and results in additional oxide thickness. The fact that MOS devices with polycide gate material can reduce damages of plasma process shows possibility that polycide gate material can be used as gate material for next generation MOS devices.

• 한국컴퓨터산업교육학회:학술대회논문집
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• 2003.11a
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• pp.95-98
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• 2003

Power semiconductors are being currently used as a application of intelligent power inverters to a refrigerator, a washing machine and a vacuum cleaner as well as core parts of industrial system. The rating of semiconductor devices is an important factor in decision on the field of application and the forward blocking voltage is one of factors in decision of the rating. The Power MOS device has a merit of high input impedance, short switching time, and stability in temperature as well known. Power MOS devices are mainly used as switches in the field of power electronics, especially the on-state resistance and breakdown voltage are regarded as the most important parameters. Power MOS devices that enable a small size, a light weight, high-integration and relatively high voltage are required these days. In this paper, we proposed the new lateral power MOS which has forward blocking voltage of 250V and contains trench electrodes and verified manufactural possibility by using TSUPREM-4 that is process simulator.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.43-51
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• 2006

80-nm self-aligned n-and p-channel I-MOS devices were demonstrated by using a novel fabrication method featuring double sidewall spacer, elevated drain structure and RTA process. The fabricated devices showed a normal transistor operation with extremely small subthreshold swing less than 12.2 mV/dec at room temperature. The n- and p-channel I-MOS devices had an ON/OFF current of 394.1/0.3 ${\mu}A$ and 355.4/8.9 ${\mu}A$ per ${\mu}m$, respectively. We also investigated some critical issues in device design such as the junction depth of the source extension region and the substrate doping concentration.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.382-384
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• 1995

The advancement of power semiconductor devices has given great attribution to the performance and reliability or power conversion systems. But contemporary power devices have room for improvement. So much interest and endeavor are being applied to develop an improved power devices. The MOS-Controlled Thyristor(MCT)is a recently developed power device which combines four layers thyristor structure and MOS-gate. Owing to advantages compared to other devices in many respects, the MCT attracts much notice recently. Nowadays, in designing and manufacturing power conversion systems, the importance of circuit simulation for reducing cost and time is incensed. And to excute the simulation that resemble the real system as much as possible, to develop a model of power device that provides properly static and dynamic characteristics is important. So, this paper presents a PSPICE model of the MCT considering dynamic characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.11a
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• pp.123-127
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• 1992

When MOS devices is exposed to radiation, radiation effects of P-type MOS capacitor can cause modulation and/or degradation in devices characteristics and its operating life. The oxide layer is grown in $O_2$+T.C.E. and its thickness ranges from 40 to 80 nm. Irradiations on MOS capacitor were performed by Cobalt-60 gamma ray source and total dose ranges from $10^4$ to $10^8$ rads. The radiation effect on electrical conduction characteristics(I-V) in MOS capacitor was measured as a function of gate oxide thickness and total dose. From the experimental result, I-V characteristics is found to be influenced strongly by total dose in irradiated p-type MOS capacitors. The ohmic current is dependant on of total dose in irradiated P-type MOS capacitors. This results are explained using surface states at interface radiation-induced traps.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.4
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• pp.223-226
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• 2003

The EKV model, a continuous model for the MOS transistor, has been adapted to both partially depleted SOI MOSFETs with grounded body (GBSOI) and dynamic threshold MOS (DTMOS) transistors. Adaptation is straightforward and helps to understand the physics of the DTMOS. Excellent agreement is found between the model and the measured characteristics of GBSOI and DTMOS devices

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.28-36
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• 1998

We have proposed a new non-inverting SOI buffer circuit for the high speed operation at low supply voltage. The body biases of main MOS devices in the proposed circuit are controlled dynamically via subsidiary MOS device connected efficiently to the body terminal. We showed current derivability of the body controlled devices obtained by device simulation and compared with that of conventional SOI devices. Delay time characteristics of the buffer circuit were analyzed by SPICE simulation and compared with those of conventional SOI CMOS buffer circuits. Delay time reduction of the SOI buffer over conventional SOI CMOS buffer with same area is about 36 % at $V_{S}$=1.2 V and $C_{L}$=2 pF. pF.

• Transactions on Electrical and Electronic Materials
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• v.6 no.1
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• pp.1-5
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• 2005

Continued scaling of MOS devices requires the formation of the ultra shallow and very heavily doped junction. The simulation and experiment results show that the degradation of pMOS performance in logic and SRAM pMOS devices due to the excessive diffusion of the tail and a large amount of dose loss in the extension region. This problem comes from the high-temperature long-time deposition process for forming the spacer and the presence of fluorine which diffuses quickly to the $Si/SiO_{2}$ interface with boron pairing. We have studied the method to improve the pMOS performance that includes the low-energy boron implantation, spike annealing and device structure design using TCAD simulation.

• Journal of the Semiconductor & Display Technology
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• v.16 no.2
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• pp.49-54
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• 2017

In this paper, recent researches on new and renewable energy have been conducted due to problems such as energy exhaustion and environmental pollution, and new researches on high efficiency and high speed switching are needed. Therefore, we compared the efficiency by using high speed switching devices instead of IGBT which can't be used in high speed switching. The experiment was performed theoretically by applying the same parameters of the high speed switching devices which are the Cool MOS of Infineon Co., SiC C3M of Cree, and GaN FET device of Transform, by implementing the DC-DC boost converter and measuring the actual efficiency for output power and frequency. As a result, the GaN FET showed good efficiency at all switching frequency and output power.