• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.446-449
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• 2004

We developed a dynamic logic architecture which resulted better leakage current, lower power consumption and less area compared to the conventional dynamic logic structures. We demonstrated the advantage from HSPICE simulation and test chip design has been completed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.6
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• pp.745-752
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• 2018

ICs(Integrated circuits) for nuclear power plant exposed to radiation environment occur malfunctions and data errors by the TID(Total ionizing dose) effects among radiation-damage phenomenons. In order to protect ICs from the TID effects, this paper proposes a radiation-hardening of the logic circuit(D-latch) which used for the data synchronization and the clock division in the ICs design. The radiation-hardening technology in the logic device(NAND) that constitutes the proposed RH(Radiation-hardened) D-latch is structurally more advantageous than the conventional technologies in that it keeps the device characteristics of the commercial process. Because of this, the unit cell based design of the RH logic device is possible, which makes it easier to design RH ICs, including digital logic circuits, and reduce the time and cost required in RH circuit design. In this paper, we design and modeling the structure of RH D-latch based on commercial $0.35{\mu}m$ CMOS process using Silvaco's TCAD 3D tool. As a result of verifying the radiation characteristics by applying the radiation-damage M&S (Modeling&Simulation) technique, we have confirmed the radiation-damage of the standard D-latch and the RH performance of the proposed D-latch by the TID effects.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.6
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• pp.30-39
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• 2014

Through a lot of papers, it has been concluded that fuzzy logic controller is superior to PI controller in motor speed control. Although fuzzy logic controller is superior to PI controller in motor speed control, the gain tuning of fuzzy logic controller is more complicated than that of PI controller. In this paper, using mathematical analysis of the PI and fuzzy controller, the design method of the fuzzy controller that has the same characteristics with the PI controller is proposed. After that, we can design the fuzzy controller that has superior performance than PI controller by changing the envelope of input of fuzzy controller to nonlinear, because the fuzzy controller has more degree of freedom to select the control gain than PI controller. The advantage of fuzzy logic controller is shown through mathematical analysis, and the simulation result using Matlab simulink has been proposed to show the effectiveness of these analysis.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1374-1376
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• 1996

In this paper We proposed a new method to generate fuzzy logic controllers through genetic algorithm(GA). In designing of fuzzy logic controllers encounters difficulties in the selection of optimized member-ship functions, gains and rule base, which is conventionally achieved by a tedious trial-and-error process. This paper develops genetic algorithms for automatic design of high performance fuzzy logic controllers which can overcome nonlinearities in many engineering control applications. The rule-base is coded in base-7 strings by generated from random function. Which can be presented in discrete fuzzy linguistic value, and using membership function with Gaussian curve. To verify the validity of this fuzzy logic controller it is compared with conventional fuzzy logic controller(FLC) and PID controller.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.652-654
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• 2016

This paper shows the Design and implementation of sinusoidal BLDC motor drive logic using SVPWM method with FPGA. Sinusoidal BLDC motor driver logic consists of sine-wave PWM generator, dead-time and lead angle control logic. PWM generator logic is designed using SVPWM method for increase of 15.5% linear domain than general sine-wave PWM. This logic is verified and implemented using Spartan-6 FPGA Board. Test results show that THD(Total Harmonic Distortion) of motor-driving current is 19.2% and rotor position resolution is 1.6 degree.

• Smart Structures and Systems
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• v.31 no.2
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• pp.199-212
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• 2023

Nowadays fuzzy logic in control applications is a well-recognized alternative, and this is thanks to its inherent advantages. Generalized type-2 fuzzy sets allow for a third dimension to capture higher order uncertainty and therefore offer a very powerful model for uncertainty handling in real world applications. With the recent advances that allowed the performance of general type-2 fuzzy logic controllers to increase, it is now expected to see the widespread of type-2 fuzzy logic controllers to many challenging applications in particular in problems of structural control, that is the case study in this paper. It should be highlighted that this is the first application of general type-2 fuzzy approach in civil structures. In the following, general type-2 fuzzy logic controller (GT2FLC) will be used for active control of a 9-story nonlinear benchmark building. The design of type-1 and interval type-2 fuzzy logic controllers is also considered for the purpose of comparison with the GT2FLC. The performance of the controller is validated through the computer simulation on MATLAB. It is demonstrated that extra design degrees of freedom achieved by GT2FLC, allow a greater potential to better model and handle the uncertainties involved in the nature of earthquakes and control systems. GT2FLC outperforms successfully a control system that uses T1 and IT2 FLCs.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.139-141
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• 2006

Quantum-dot Cellular Automata (QCA) is one of the most promising next generation nano-electronic devices which will inherit the throne of CMOS which is the domineering implementation technology of large scale low power digital systems. In late 1990s, the basic operations of the QCA cell were already demonstrated on a hardware implementation. Also, design tools and simulators were developed. Nevertheless, its design technology is not quite ready for ultra large scale designs. This paper proposes a new approach which enables the QCA designs to inherit the verification methodologies and tools of CMOS designs, as well. First, a set of disciplinary rules strictly restrict the cell arrangement not to deviate from the predefined structures but to guarantee the deterministic digital behaviors. After the gate and interconnect structures of the QCA design are identified, the signal integrity requirements including the input path balancing of majority gates, and the prevention of the noise amplification are checked. And then the digital logic is extracted and stored in the OpenAccess common engineering database which provides a connection to a large pool of CMOS design verification tools. Towards validating the proposed approach, we designed a 2-bit QCA adder. The digital logic is extracted, translated into the Verilog net list, and then simulated using a commercial software.

• Journal of Computational Design and Engineering
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• v.3 no.1
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• pp.1-13
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• 2016

The increase of consumer needs for quality metal cutting related products with more precise tolerances and better product surface roughness has driven the metal cutting industry to continuously improve quality control of metal cutting processes. In this paper, two different approaches are discussed. First, design of experiments (DOE) is used to determine the significant factors and then fuzzy logic approach is presented for the prediction of surface roughness. The data used for the training and checking the fuzzy logic performance is derived from the experiments conducted on a CNC milling machine. In order to obtain better surface roughness, the proper sets of cutting parameters are determined before the process takes place. The factors considered for DOE in the experiment were the depth of cut, feed rate per tooth, cutting speed, tool nose radius, the use of cutting fluid and the three components of the cutting force. Finally the significant factors were used as input factors for fuzzy logic mechanism and surface roughness is predicted with empirical formula developed. Test results show good agreement between the actual process output and the predicted surface roughness.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.793-794
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• 2011

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• Journal of Sensor Science and Technology
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• v.26 no.3
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• pp.209-213
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• 2017

The delay-insensitive Null Convention Logic (NCL) asynchronous design as one of innovative asynchronous logic design methodologies has many advantages of inherent robustness, power consumption, and easy design reuses. However, transistor-level structures of conventional NCL gate cells have weakness of high area overhead and high power consumption. This paper proposes a new NCL gate based on power gating structure. The proposed $4{\times}4$ NCL multiplier based on power gating structure is compared to the conventional NCL $4{\times}4$ multiplier and MTNCL(Multi-Threshold NCL) $4{\times}4$ multiplier in terms of speed, power consumption, energy and size using PTM 45 nm technology.