• Title/Summary/Keyword: Local memory

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Hardware Approach to Fuzzy Inference―ASIC and RISC―

  • Watanabe, Hiroyuki
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.975-976
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    • 1993
  • This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

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A Study on Commemoration Characteristics of Vietnam War Memorials in Korea (한국에 있는 베트남전쟁 메모리얼에 나타난 기념성)

  • Lee, Sang-Seok
    • Journal of the Korean Institute of Landscape Architecture
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    • v.44 no.4
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    • pp.22-34
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    • 2016
  • The purpose of this study was to analyze commemoration characteristics of fifty-nine Vietnam war memorials in Korea(VWMK) including monuments and national cemeteries from landscape architectural point of view such as location, spacial characteristic, landscape detail, sculpture, and interpretive text. Based on the commemoration characteristics of the analysis, the commemoration culture among Vietnam, the U.S.A., and Korea were studied and differences compared. The results are as follows. First, monuments were mainly located in public open space such as national cemeteries, parks, and plaza, and some of them were elected along with Korea war memorials to honor Vietnam war veterans at the national level. Second, because the monuments were relatively small and memorial towers were conventionally built on a square platform, the memorial style had been simply standardized to stereotype the commemoration characteristics. Third, outmoded memorial towers, stone plates, emblems, and memorial walls were used as main landscape details and standardized facilities were considered from an artistic and social point of view. Fourth, realistic soldier statues to show heroic and humanitarian image were in majority, while symbolic and abstract sculpture were small in number, they were mostly conventional and unexpressive. Fifth, the causes of participation in the Vietnam War were predominantly expressed as 'defending freedom', 'keeping world peace', and 'national economic development' based on anti-communism and patriotism, and also the collectivity of Vietnam War veterans by troop and local level was emphasized through engraving each veterans's name on towers, plates, and walls. VWMK are mostly conventional and stereotyped in style and show strongly national official memory and the collectivity of veterans from a sociopolitical perspective, and aim for anti-communistic patriotism ideologically. Further study and projects will be required to make creative and innovative memorials and to study how to rethink sublime fundamental themes like war, death, and the individual veteran's experience in VWMK.

The Counter-memory and a Historical Discourse of Reproduced Records in the Apartheid Period : Focusing on 『Rise and Fall of Apartheid: Photography and the Bureaucracy of Everyday Life』 (아파르트헤이트 시기의 대항기억과 재생산된 기록의 역사 담론 전시 『Rise and Fall of Apartheid : Photography and the Bureaucracy of Everyday Life』를 중심으로)

  • Lee, Hye-Rin
    • The Korean Journal of Archival Studies
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    • no.74
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    • pp.45-78
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    • 2022
  • South Africa implemented apartheid from 1948 to 1994. The main content of this policy was to classify races such as whites, Indians, mixed-race people, and blacks, and to limit all social activities, including residence, personal property ownership, and economic activities, depending on the class. All races except white people were discriminated against and suppressed for having different skin colors. South African citizens resisted the government's indiscriminate violence, and public opinion criticizing them expanded beyond the local community to various parts of the world. One of the things that made this possible was photographs detailing the scene of the violence. Foreign journalists who captured popular oppression as well as photographers from South Africa were immersed in recording the lives of those who were marginalized and suffered on an individual level. If they had not been willing to inform the reality and did not actually record it as a photo, many people would not have known the horrors of the situation caused by racial discrimination. Therefore, this paper focuses on Rise and Fall of Apartheid: Photography and the Bureau of Everyday Life, which captures various aspects of apartheid and displays related records, and examines the aspects of racism committed in South Africa described in the photo. The exhibition covers the period from 1948 when apartheid began until 1995, when Nelson Mandela was elected president and the Truth and Reconciliation Commission was launched to correct the wrong view of history. Many of the photos on display were taken by Peter Magubane, Ian Berry, David Goldblatt, and Santu Mofoken, a collection of museums, art galleries and media, including various archives. The photographs on display are primarily the work of photographers. It is both a photographic work and a media that proves South Africa's past since the 1960s, but it has been mainly dealt with in the field of photography and art history rather than from a historical or archival point of view. However, the photos have characteristics as records, and the contextual information contained in them is characterized by being able to look back on history from various perspectives. Therefore, it is very important to expand in the previously studied area to examine the time from various perspectives and interpret it anew. The photographs presented in the exhibition prove and describe events and people that are not included in South Africa's official records. This is significant in that it incorporates socially marginalized people and events into historical gaps through ordinary people's memories and personal records, and is reproduced in various media to strengthen and spread the context of record production.

An Efficient Array Algorithm for VLSI Implementation of Vector-radix 2-D Fast Discrete Cosine Transform (Vector-radix 2차원 고속 DCT의 VLSI 구현을 위한 효율적인 어레이 알고리듬)

  • 신경욱;전흥우;강용섬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.12
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    • pp.1970-1982
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    • 1993
  • This paper describes an efficient array algorithm for parallel computation of vector-radix two-dimensional (2-D) fast discrete cosine transform (VR-FCT), and its VLSI implementation. By mapping the 2-D VR-FCT onto a 2-D array of processing elements (PEs), the butterfly structure of the VR-FCT can be efficiently importanted with high concurrency and local communication geometry. The proposed array algorithm features architectural modularity, regularity and locality, so that it is very suitable for VLSI realization. Also, no transposition memory is required, which is invitable in the conventional row-column decomposition approach. It has the time complexity of O(N+Nnzp-log2N) for (N*N) 2-D DCT, where Nnzd is the number of non-zero digits in canonic-signed digit(CSD) code, By adopting the CSD arithmetic in circuit desine, the number of addition is reduced by about 30%, as compared to the 2`s complement arithmetic. The computational accuracy analysis for finite wordlength processing is presented. From simulation result, it is estimated that (8*8) 2-D DCT (with Nnzp=4) can be computed in about 0.88 sec at 50 MHz clock frequency, resulting in the throughput rate of about 72 Mega pixels per second.

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A Study on the policy of activate Baekje Cultural goods -focus on Gongju-Buyeo national museum- (백제문화상품 활성화 정책에 관한 연구 -공주.부여 국립박물관 중심으로-)

  • Shin, Dae-Teak;Park, Seung-Chul
    • Journal of Digital Convergence
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    • v.10 no.5
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    • pp.333-338
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    • 2012
  • Cultural goods is carrying nature and value above-mentioned a commodity to what a cultural element was commercialized. And it produced for the purpose of manufacture for popular sales and supply, and holding commercial character. Specially, cultural goods of a museum keeps a good memory to a sightseer, and broaden an educational experience, and the source of profit becomes it to a seller a producer. This cultural goods as they all include the artistic historical figurative background that they are displayed directly and got twisted up to collection have background which became a motive. Cultural goods can acquire cultural difference in globalization and have to be based on the soil of cultural heritage, starting around various cultural materials through practical value to a modern life. Internationally, cultural goods using a culture material development have competitiveness of nation as in it. Therefore, Baekje cultural goods need national and positive aid from the government with the customer satisfaction index considering the modern design, an age group, an internal and external commodity as the difficulty of various commodity development and managing museum shop. Furthermore, like overseas museum shop, if we are practically using on-off line, continuous promoting our commodity, and marketing strategy such as a membership system when buy our cultural goods, a special discount event etc., we can contribute to activate local economy as a museum shop when we have responsibility of the function and the part.

A Study on a Coping Method of the Family Caregivers of Demented Patients (치매노인 가족부양자의 대처방법에 관한 연구)

  • You, Kwang-Soo
    • Research in Community and Public Health Nursing
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    • v.13 no.4
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    • pp.648-667
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    • 2002
  • This was a descriptive study designed to identify the level of coping method and its influencing factors on the family caregivers of demented patients, and resolve the family caregivers' level of stress. The data were collected from September 10 to October 10, 2001. Subjects for this study were recruited from four clinics, which were chosen from 15 clinics located in Chunbuk-Do as the study sites because of their cooperation for the study. They were similar in terms of size, the characteristics of the local community. and the population and registration status of the demented patients. The instruments used for the study were as follows: 1. Problematic behaviors of demented patients are measured by the Memory and Behavior Problem Checklist (Zarit, 1980), and the Linguistic Communication Symptoms Questionnaire (Bayles and Tomoeda, 1991) 2. The ability to carry out daily activities was measured using the Barthel Index (1965) and Katz Index (1963), which as well-known ADL assessment methods. 3. Burden was measured using Cost of Care Index by the Kosberg and Cairl (1986). 4. Coping strategy was measured Bell's 18 methods (1977). The data were analyzed using SPSS/PC. The study results were as follows: 1. The total stress score was 2.90 out of a maximum score of 5. The highest score reported was 3.09 on the dimension of restriction of individual and social activities, and the lowest region reported was 2.58 on the dimension of mental and physical health. 2. The total score of the coping method was 2.65 out of a maximum score of 5. The highest score reported was 4.01 on the dimension of thinking that includes an ideation such that it is better than any possible worst case, and the lowest score reported was 1.45 on the dimension of the self-image as a scapegoat. 3. There were significant differences in coping method among the subjects by age (F=2.752 p=0.04), caregiver (F=4.33 p=0.003), care-giving period (F=2.68 p=0.049), and dementia stage (F=2.87 p=0.034). 4. There were highly negative correlations ($\gamma$=-0.301 p=0.000) between problematic behaviors of demented patients and the coping method of their family caregivers. The highest correlation coefficient ($\gamma$=-0.339 p=0.000) was found between aggressive behaviors of the demented patients and the coping method of their family caregivers. 5. There was a low negative correlation ($\gamma$=-0.201 p=0.019) between the ADL of the demented patients and the coping method of their family caregivers. 6. There were highly negative correlations ($\gamma$=-0.213 p=0.005) between stress and the coping method of the family caregivers. The highest correlation was found between financial burden ($\gamma$=-.327 P=.000) and the coping method of the family caregivers. There was no significant correlation among unpleasant aspects of the demented patients, willingness to the demented patients, and the coping method of the family caregivers.

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A study on the interrelation to simplicity of Symbolmarks & Images (심벌마크의 단순성과 이미지의 상관관계에 대한 연구)

  • 박동경
    • Archives of design research
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    • v.20
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    • pp.199-208
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    • 1997
  • The emphasis of simplicity in design is because of the desire to deliver much content with a simplest way. Since in general, a simple form is outstanding in its symbolical nature and the relief of plastic beauty is easy by it, it is usually applied to a form of a symbol mark. However, in the meantime, if any local autonomous group or enterprise which has not tried to give efforts to its advertisement than they might expect and might be disadvantageous in competition. For consumers, when they experienced several, forms of simple, symbol mark, would not remember the special features of each mark. Rather, for the psychology of perception, they might remember only the formative, common features, there by grouping the marks by their common features. In this study, some symbol marks in Dobong-gu Ward Office and Wonju city were inspected, reviewed, and analized. And its is a finding that the subjects of this study could not distinguish or identify any of marks from another mark having a similar image of it: the reason is that the simplicity of a symbol mark made or allowed them to recognize it identical with the other imaged: it proves that the mistakes, defects of memory, and accumulated errors are oriented to the identical image. After all, the appearented image and perceived image are differnt. Any of symbolmarks which takes a simple form does not mean the perceived image is also simple. As a final conclusion, designers, in order to produce any of competitive symbolmarks, need to thoroughly understand psychology of gestalt.

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Back-end Prefetching Scheme for Improving the Performance of Cluster-based Web Servers (클러스터 웹 서버에서 성능 향상을 위한 노드간 선인출 기법)

  • Park, Seon-Yeong;Park, Do-Hyeon;Lee, Joon-Won;Cho, Jung-Wan
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.5
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    • pp.265-273
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    • 2002
  • With the explosive growth of WWW traffic, there is an increasing demand for the high performance Web servers to provide a stable Web service to users. The cluster-based Web server is a solution to core with the heavy access from users, easily scaling the server according to the loads. In the cluster-based Web sewer, a back-end node may not be able to serve some HTTP requests directly because it does not have the requested contents in its main memory. In this case, the back-end node has to retrieve the requested contents from its local disk or other back-end nodes in the cluster. To reduce service latency, we introduce a new prefetch scheme. The back-end nodes predict the next HTTP requests and prefetch the contents of predicted requests before the next requests arrive. We develop three prefetch algorithms bated on some useful information gathered from many clients'HTTP requests. Through trace-driven simulation, the service latency of the prefetch scheme is reduced by 10 ~ 25% as compared with no prefetch scheme. Among the proposed prefetch algorithms, Time and Access Probability-based Prefetch (TAP2) algorithm, which uses the access probability and the inter-reference time of Web object, shows the best performance.

Deinterlacing Method for improving Motion Estimator based on multi arithmetic Architecture (다중연산구조기반의 고밀도 성능향상을 위한 움직임추정의 디인터레이싱 방법)

  • Lee, Kang-Whan
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.1
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    • pp.49-55
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    • 2007
  • To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).

Convergent Web-based Education Program to Prevent Dementia (웹기반의 치매 예방용 융합교육 프로그램 개발)

  • Park, Kyung-Soon;Park, Jae-Seong;Ban, Keum-Ok;Kim, Kyoung-Oak
    • The Journal of the Korea Contents Association
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    • v.13 no.11
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    • pp.322-331
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    • 2013
  • The purpose of the present study was to develop a convergent education contents for dementia prevention, operating on the web network applying modern information technology(IT). At the preparation stage, local and worldwide literatures related to dementia were analyzed followed by surveying industry demands, based on which the program was designed and developed. In the following enhancement stage, the program was modified as much as possible by advices obtained from experts in various fields. Development results of the present program are summarized as follows. Firstly, 645 intellect development model to prevent dementia was established through peer review and verification of convergent education theories by expert groups. This model was named as "Garisani" meaning "cognition capable of judging objects" in the Korean language. Secondly, 'Find a way' and 'Connect a line' modules were developed in the numeric field as well as 'Identify a letter(I, II)' modules, in the language field for web-based left brain training program. Thirdly, 'Find my car' and 'Vision training' modules in the attention field and 'Object inference' and 'Compare pictures' modules in the cognition field were developed for web-based right brain training program. Fourth, 'Pentomino' and 'BQmaze'(Brain Quotient and maze) modules in the space perception field and 'Visual training' in the memory field were developed for web-based left and right brains training. Fifth, all results were integrated leading to a 52 week Garisani convergent education program for dementia prevention.