• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2000.11a
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• pp.225-230
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• 2000

This paper describes a double-ended current fed push-pull type high frequency resonant inverter used as the power supply for wax-sealing. The proposed inverter can realize ZVS operation by using resonant capacitor to ZVS capacitor and has some merits not only reduction of switch current distribution but also extension of load range compare to the conventional single-ended current fed push-pull type high frequency resonant inverter. This analysis of proposed circuit uses normalized parameter ad characteristic estimation which is needed in each step before design is generally described according to normalized frequency($\mu$), normalized resistance(λ) and parameters. It is also presented as an example of method of the circuit design based on estimation analysis values from theoretical analysis. The theoretical analysis is proved through experiment and this circuit shows that it can be used practically as the power supply system for wax-sealing and DC-DC converter.

• Journal of Industrial Technology
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• v.21 no.B
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• pp.195-203
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• 2001

The purpose of this study is to estimate ultimate uplift capacity of permanent anchor which was cast into weathered rock. The ultimate uplift capacity was estimated from the load-displacement curve of four different anchors which have different bond length. The creep test was performed for 15minutes under the maximum load of each step in order to understand the load-transfer property of permanent anchor and to decide which anchor to choose. The destruction range of soil due to the changes in load was estimated by installing dial gauge on the ground which was cast into the weathered rock. Ultimately, the study on the behavior of the anchor case into the weathered rock was performed by comparing and analyzing the estimated result of the UUC obtained by the full scale pull out test in the field with the exsting theoretical and practical results of soil and rock anchor.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.53-61
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• 2014

In this paper, we present the design, fabrication and measurement of high efficiency GaN HEMT power amplifier using harmonic matching technique. In order to achieve high efficiency, harmonic load-pull simulation is performed, that is, the optimum load impedances are determined at $2^{nd}$ and $3^{rd}$ harmonic frequencies as well as at the fundamental. Then, the output matching circuit is designed based on harmonic load-pull simulation. The measurement of the fabricated power amplifier shows the linear gain of 20 dB and $P_{1dB}$(1 dB gain compression point) of 33.7 dBm at 1.85 GHz. The maximum power added efficiency(PAE) of 80.9 % is achieved at the output power of 38.6 dBm, which belongs to best efficiency performance among the reported high efficiency power amplifiers. For W-CDMA input signal, the power amplifier shows a PAE of 27.8 % at the average output power of 28.4 dBm, where an ACLR (Adjacent Channel Leakage Ratio) is measured to be -38.8 dBc. Digital predistortion using polynomial fitting was implemented to linearize the power amplifiers, which allowed about 6.2 dB improvement of an ACLR performance.

• Journal of the Korea institute for structural maintenance and inspection
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• v.26 no.6
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• pp.73-81
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• 2022

Recently, as the service life of structures increased, the load-carrying capacity of deteriorated reinforced concrete, where corrosion of reinforcing bars occurs due to various causes, is frequently decreased. In order to address this problem, many studies on the bond characteristic of FRP (Fiber Reinforced Polymer) bars with corrosion resistance, light weight and high tensile strength have been conducted, however there are not many studies on the bond characteristic of grid-typed CFRP embedded in concrete. Therefore, in order to evaluate the bond characteristics of grid-typed CFRP and its usability as a substitute for steel rebar, a pull-out test is performed using the longitudinal bond length and transverse grid length of the grid-typed CFRP as variables. Through the pull-out test, the bond load-slip curve of the grid-typed CFRP is derived, and the bond behavior is analyzed. The total bond load equation is proposed as the sum of the bond force of the longitudinal bond length and the shear force of the grid in the transverse direction. Also, expressing the area of the bond load-slip curve as total work, the change in dissipated energy with respect to the slip is analyzed to examine the effect of the tranverse grid on the bond force.

• International Journal of High-Rise Buildings
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• v.4 no.4
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• pp.249-259
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• 2015

This paper introduces the structural design and construction method for the foundation of the TOKYO SKYTREE, a new digital broadcasting tower in Tokyo, which has a height of 634 meters. The surface layer of the ground is occupied by soft soil, thus the foundation of this tower is an SRC continuous underground wall pile, designed and developed to have horizontal rigidity and pull-out resistance. The structural integrity and construction method of the wall pile was verified with an on-site full scale pull-out test concluding a maximum load of 40,000 kN.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.489-492
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• 2000

A novel low-cost simple and unity-power-factor electronic ballast is presented. The proposed electronic ballast employs a bypassing capacitor and load networks composed of ballast capacitors and small charge pump capacitors as power factor correction circuit combined with the secondary winding of the transformer in the self-excited current-fed push-pull resonant inverter(CF-PPRI) resulting in cost-effectiveness and higher efficiency. By analyzing the principles of power factor correction mathematically optimum design guidelines are presented. Since the lamps are used in power factor correction stage the input power is automatically adjusted according to the number of the lamps.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2014.05a
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• pp.238-239
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• 2014

It is well known that the bond characteristics of fiber govern the performance of fiber reinforced composite material. A preliminary study was carried out to investigate the pull-out behavior of amorphous and conventional single fiber in cement mortar in accordance with the JCI(Japan Concrete Institute) SF-8. The test was performed under displacement control, and results showed that the bond strength decreased with increasing fiber length. In addition, the amorphous steel fiber showed much higher pull-out load per unit weight compared to conventional steel fiber.

• Proceedings of the KIEE Conference
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• 2003.07e
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• pp.113-116
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• 2003

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In this paper, proposes a method for efficiently generating test pattern which detect faults in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.53 no.1
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• pp.22-27
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• 2004

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential behavior. In this paper, proposes a method for efficiently generating test pattern which detect stuck-open in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.2
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• pp.184-195
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• 1996

Beause BiCMOS logic circuits consist of CMOS part which constructs logic function and bipolar part which drives output load, the effect of short faults on BiCMOS logic circuits represented different types from that on CMOS. This paper proposes new test method which detects short faults on BiCMOS logic circuits using current path graph. Proposed method transforms BiCMOS circuits into raph constructed by nodes and edges using extended switch-level model and separates the transformed graph into pull-up part and pull-down part. Also, proposed method eliminates edge or add new edge, according ot short faults on terminals of transistor, and can detect short faults using current path graph that generated from on- or off-relations of transistor by input patterns. Properness of proposed method is verified by comparing it with results of spice simulation.