• Proceedings of the KIEE Conference
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• 2001.07a
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• pp.19-21
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• 2001

Nowadays, small scale DGS(Distributed Generation System), as a wind power generation or photovoltaic generation, becomes to be introduced into the power distribution system. But in that case it is difficult to properly maintain the terminal voltage of low voltage customers by using only LDC(Line Drop Compensator). So, it is necessary to determine the permissible operation limit of the introduced DGS for proper voltage in distribution system. In this paper clarifies the relationship between LDC voltage regulation principle and real, reactive power of DGS, and examines the permissible operation limit of the introduced DGS in distribution system which the voltage is controlled by LDC.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2199-2201
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• 2005

High voltage power supply with pulse load($4.5{\mu}s$ and PRF 60Hz) condition is investigated which is of interest for applications like Klystron modulator power supplies with output voltage of 50kV. The performance specifications with this type of power supplies are very stringent demanding tight regulation(<0.01%) and high efficiency(> 85%). The solution to this problem as a single stage converter is very difficult. The final output voltage is obtained as sum of the output of SCPS & PCPS. The combination of the two stages can satisfy the pulse load specifications. The analysis of the voltage and power division between SCPS & PCPS has been done for the proposed topology. It has studied under various operating conditions of line and load. Simulation results are validated by experimental results.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.604-608
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• 2003

In this paper, we studied the radiated electric field of power-line with DMT signal source in the frequency range of $1.7{\sim}30 MHz$. First, we made the midium voltage power-line communication model for PLC and calculated the current through the power-line using the impedance of the power-line model. Second, we calculated the radiated electric field in power range $-50{\sim}-30 dBm$ using the calculated current. Consequently, the calculated emissive electromagnetic field from the DMT signal is similar to the measured result. So this study is applicable to the standard regulation of electromagnetic interference for PLC.

• 전기의세계
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• v.31 no.1
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• pp.50-58
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• 1982

As a method for improving the power factor and the waveform of ac line current drawn by ac to dc converters, converters of pulse-width control type with forced commutation circuits have been developed in recent years. However, these converters have rather complex commutation circuits which contain auxiliary thyristors in addition to the main thyristors, and their performance is not satisfactory. This paper proposes a new pulse-width controlled ac to dc converter, and analyses its commutation mechanism and its input and output characteristics. The proposed converter circuit consists of a usual thyristor bridge circuit with series diodes to which reactors and diodes are added. This circuit dose not contain auxiliary thyristors, and in this sense it is simpler than the previous converter circuits of pulse-width control type. Since the main thyristors of the converter can be forcedly turned off several times in a half cycle of source voltage, a pulse-width modulation control is possible in order to improve the current waveform as well as the power factor on ac line side. As to dc output side it is shown that the adjustable range of output voltage is wide and the voltage regulation is good due to a rapid reversal of voltage across the commutating capacitors by LC resonance during commutation period. It is also shown that the regenerative operation of the converter is possible.

• Journal of Power Electronics
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• v.17 no.4
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• pp.1088-1096
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• 2017

Load variations on a distribution line result in voltage fluctuations at the point of common coupling (PCC). In order to keep the magnitude of the PCC voltage constant at its rated value and obtain zero voltage regulation (ZVR), a D-STATCOM is installed for voltage correction. Moreover, the ZVR mode of a D-STATCOM can also be used to balance the source current during unbalanced loading. For medium voltage and high power applications, a D-STATCOM is realized by the cascaded H-bridge topology. In the ZVR mode, the D-STATCOM may draw unbalanced current and in this process is required to handle different phase powers leading to deviations in the cluster voltages. Zero sequence voltage needs to be injected for ZVR mode, which creates circulating power among the phases of the D-STATCOM. The computed zero sequence voltage and the individual DC capacitor balancing controller help the DC cluster voltage follow the reference voltage. The effectiveness of the control scheme is verified by modeling the system in MATLAB/SIMULINK. The obtained simulations are further validated by the experimental results using a dSPACE DS1106 and five-level D-STATCOM experimental set up.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.528-533
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• 2016

A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage $V_{reg}$ for the BG core and Op-Amp rather than the VDD. These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a $0.35{\mu}m$ CMOS technology. The BGR circuit occupies $0.024mm^2$ of the die area and consumes $200{\mu}W$ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 dB at frequencies up to 1 kHz and -55 dB at 1 MHz without additional circuits for the curvature compensation. A temperature coefficient of $60 ppm/^{\circ}C$ is obtained in the range of -40 to $120^{\circ}C$.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1209-1217
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• 2016

This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

• Journal of Power Electronics
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• v.11 no.3
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• pp.375-380
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• 2011

A STATic synchronous COMpensator (STATCOM) is a shunt connected voltage source converter (VSC) based FACTS controller using Gate Turn Off (GTO) power semiconductor devices employed for reactive power control. The operation principal is similar to that of a synchronous condenser. A typical application of a STATCOM is voltage regulation at the midpoint of a long transmission line for the enhancement of power transfer capability and/or reactive power control at the load centre. This paper presents the modeling of STATCOM with twenty four pulse three level VSC and Type-1 controller to regulate the reactive current or the bus voltage. The performance is evaluated by transient simulation. It is observed that, the STATCOM shows excellent transient response to step change in the reactive current reference. While the eigenvalue analysis is based on D-Q model, the transient simulation is based on both D-Q and 3 phase models of STATCOM (which considers switching action of VSC).

• Journal of IKEEE
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• v.21 no.3
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• pp.264-267
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• 2017

In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

• Journal of IKEEE
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• v.26 no.2
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• pp.313-318
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• 2022

The feedback voltage detection structure is proposed to alleviate overshoot and undershoot caused by the removal of the existing external output capacitor. Conventional LDO regulators suffer from overshoot and undershoot caused by imbalances in the power supply voltage. Therefore, the proposed LDO is designed to have a more improved transient response to form a new control path while maintaining only the feedback path of the conventional LDO regulator. A new control path detects overshoot and undershoot events in the output stage. Accordingly, the operation speed of the pass element is improved by charging and discharging the current of the gate node of the pass element. LDO regulators with feedback voltage sensing architecture operate over an input voltage range of 3.3V to 4.5V and have a load current of up to 200mA at an output voltage of 3V. According to the simulation result, when the load current is 200mA, it is 73mV under the undershoot condition and 61mV under the overshoot condition.