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Feedback Voltage Detection 구조 및 향상된 과도응답 특성을 갖는 LDO regulator

LDO Regulator with Improved Transient Response Characteristics and Feedback Voltage Detection Structure

  • Jung, Jun-Mo (Dept. of Electronic Engineering, SeoKyeong University)
  • 투고 : 2022.06.08
  • 심사 : 2022.06.27
  • 발행 : 2022.06.30

초록

피드백 전압 감지 구조는 기존 외부 출력 캐패시터의 제거로 인한 오버슈트 및 언더슈트 현상을 완화하기 위해 제안된다. 기존의 LDO 레귤레이터는 전원 공급 전압의 불균형으로 인해 발생하는 오버슈트 및 언더슈트를 겪는다. 따라서 제안된 LDO는 기존 LDO의 피드백 경로만 유지하면서 새로운 제어 경로를 형성하기 위해 보다 개선된 과도 응답을 갖도록 설계되었다. 새로운 제어 경로는 출력 단계에서 발생하는 오버슈트 및 언더슈트 현상을 감지한다. 이에, 패스 소자의 게이트 노드의 전류를 충방전함으로써 패스 소자의 동작 속도가 향상된다. 피드백 전압 감지 구조가 있는 LDO 레귤레이터는 3.3~4.5V의 입력 전압 범위에서 작동하며 3V의 출력 전압에서 최대 200mA의 부하 전류를 가집니다. 시뮬레이션 결과에 따르면 부하전류가 200mA일 때 언더슈트 조건에서는 73mV, 오버슈트 조건에서는 61mV이다.

The feedback voltage detection structure is proposed to alleviate overshoot and undershoot caused by the removal of the existing external output capacitor. Conventional LDO regulators suffer from overshoot and undershoot caused by imbalances in the power supply voltage. Therefore, the proposed LDO is designed to have a more improved transient response to form a new control path while maintaining only the feedback path of the conventional LDO regulator. A new control path detects overshoot and undershoot events in the output stage. Accordingly, the operation speed of the pass element is improved by charging and discharging the current of the gate node of the pass element. LDO regulators with feedback voltage sensing architecture operate over an input voltage range of 3.3V to 4.5V and have a load current of up to 200mA at an output voltage of 3V. According to the simulation result, when the load current is 200mA, it is 73mV under the undershoot condition and 61mV under the overshoot condition.

키워드

과제정보

This Research was supported by Seokyeong University in 2022.

참고문헌

  1. Yong-Seo Koo, et al.: "A design of low-area low drop-out regulator using body bias technique," IEICE Electronics Express Vol.10, 2013. DOI: 10.1587/elex.10.20130300
  2. Jin Woo Jun, et al.: "Design of high-reliability LDO with current limiting characteristics with built-in new high tolerance ESD protection circuit," IEICE Electron. Express, Vol.10, 2013. DOI: 10.1587/elex.10.20130516
  3. Kyeong-Hyeon Park, et al.: "A Design of Low-dropout Regulator with Adaptive Threshold Voltage Technique," JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENC, 2018. DOI: 10.5573/JSTS.2018.18.2.287
  4. Xiaofei Ma, et al.: "A Fully Integrated LDO With 50-mV Dropout for Power Efficiency Optimization," IEEE Transactions on Circuits and Systems II: Express Briefs, 2020. DOI: 10.1109/TCSII.2019.2919665
  5. Ka Nang Leun , et al.: "A CMOS Low-Dropout Regulator With a Momentarily Current-Boosting Voltage Buffer," IEEE Transactions on Circuits and Systems I: Regular Papers, 2010. DOI: 10.1109/TCSI.2010.2043171
  6. Jun Tang, et al.: "Low-Power Fast-Transient Capacitor-Less LDO Regulator with High Slew-Rate Class-AB Amplifier," IEEE Transactions on Circuits and Systems II: Express Briefs, 2018. DOI: 10.1109/TCSII.2018.2865254.
  7. Yan Lu, et al.: "A Fully-Integrated Low-Dropout Regulator with Full-Spectrum Power Supply Rejection," IEEE Transactions on Circuits and Systems I: Regular Papers, 2015. DOI: 10.1109/TCSI.2014.2380644
  8. Amir Nakhlestan, et al.: "Low-Power Area-Efficient LDO With Loop-Gain and Bandwidth Enhancement Using Non-Dominant Pole Movement Technique for IoT Applications," IEEE Transactions on Circuits and Systems II: Express Briefs, 2021. DOI: 10.1109/TCSII.2020.3013646