• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.6
• /
• pp.1150-1156
• /
• 2009

In this paper, we propose the gradual encryption method of image using LFSR(Linear Feedback Shift Register) and 2D CAT(Two-Dimensional Cellular Automata Transform). First, an LFSR is used to create a PN(pseudo noise) sequence, which is identical to the size of the original image. Then the created sequence goes through an XOR operation with the original image resulting to the first encrypted image. Next, the gateway value is set to produce a 2D CAT basis function.The created basis function multiplied with the first encrypted image produces the 2D CAT encrypted image which is the final output. Lastly, the stability analysis verifies that the proposed method holds a high encryption quality status.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2009.05a
• /
• pp.164-167
• /
• 2009

In this paper, we propose the image encryption using LFSR(Linear Feedback Shift Register) and 2D CAT(Two-Dimensional Cellular Automata Transform). First, a LFSR is used to create a PN(pseudo noise) sequence, which is identical to the size of the original image. Then, the created sequence goes through a XOR operation with the original image to convert the original image. Next, the gateway value is set to produce a 2D CAT basis function. Using the created basis function, multiplication is done with the converted original image to process 2D CAT image encipherment. Lastly, the stability analysis verifies that the proposed method holds a high encryption quality status.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.3
• /
• pp.707-714
• /
• 2010

Since an LFSR(linear feedback shift register) as a pattern generator has solely linear dependency in itself, it generates sequences by moving the bit positions for pattern generation. So the correlation between the generated patterns is high and thus reduces the possibility of fault detection. To overcome these problems many researchers studied to have goodness of randomness between the output test patterns. In this paper, we propose the new and effective method to construct phase shifter as PRPG(pseudo random pattern generator).

• Journal of Korea Society of Industrial Information Systems
• /
• v.8 no.3
• /
• pp.85-90
• /
• 2003

This paper proposes a modular multiplier based on LFSR (Linear Feedback Shift Register) architecture with efficient area complexity over GF(2/sup m/). At first, we examine the modular exponentiation algorithm and propose it's architecture, which is basic module for public-key cryptosystems. Furthermore, this paper proposes on efficient modular multiplier as a basic architecture for the modular exponentiation. The multiplier uses AOP (All One Polynomial) as an irreducible polynomial, which has the properties of all coefficients with '1 ' and has a more efficient hardware complexity compared to existing architectures.

• Journal of Korea Society of Industrial Information Systems
• /
• v.10 no.3
• /
• pp.57-63
• /
• 2005

Kim and Fenn et al. proposed two modular AB multipliers based on LFSR(Linear Feedback Shift Register) architecture. These multipliers use AOP, which has all coefficients with '1', as an irreducible polynomial. Thereby, they have good hardware complexity compared to the previous architectures. This paper proposes a modular $AB^2$ multiplier based on LFSR architecture and a modular exponentiation architecture to improve the hardware complexity of the Kim's. Our multiplier also use the AOP as an irreducible polynomial as the Kim architecture. Simulation result shows that our multiplier reduces the hardware complexity about $50\%$ in the perspective of XOR and AND gates compared to the Kim's. The architecture could be used as a basic block to implement public-key cryptosystems.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.7C
• /
• pp.915-920
• /
• 2004

In this paper, we propose the new polyphase sequence with the best nonperiodic autocorrelation property in the viewpoint of the merit factors, which are important criteria for a nonperiodic autocorrelation property. We propose the general implementation of a polyphase sequence generator over an integer residue ring by using a linear feedback shift register(LFSR), in addition, we analyze the linear complexities of polyphase sequences based on the proposed implementation method.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.9 no.2
• /
• pp.3-12
• /
• 1999

We introduce feedback registers and definitions of complexity of a register or a sequence generated by it. In the view point of cryptography the linear complexity of an ultimately periodic sequence is important because large one gives an enemy infeasible jobs. We state some results about the linear complexity of sum and product of two LFSRs.

• The KIPS Transactions:PartC
• /
• v.8C no.1
• /
• pp.12-15
• /
• 2001

A summation generator creates sequence from addition with carry of LFSR (Linear Feedback Shift Register) sequences. Similarly, it is possible to generate keystream by bitwise exclusive-oring on two FCSR sequences. In this paper, we described the cryptographic properties of a sequence generated by the FCSRs.

• 한국HCI학회:학술대회논문집
• /
• 2007.02a
• /
• pp.790-795
• /
• 2007

최근 유비쿼터스 컴퓨팅에 대한 연구가 활발히 진행되고 있으며 유비쿼터스 컴퓨팅의 실현을 위한 핵심기술로서 RFID 시스템에 대한 연구가 활발히 진행되고 있다. 유비쿼터스 환경에서 RFID 시스템이 사용자의 편리함을 가져다 주는 장점이 있는 반면, 이로 인해 사용자의 프라이버시가 침해 당할 수 있는 문제점 또한 가지고 있다. 본 논문에서 사용자 인증 알고리즘은 새로운 해쉬 함수를 사용하고 그리고 메시지 암호화를 위한 스트림 암호기는 LFSR(Linear Feedback Shift Register)을 사용한다.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.42 no.3 s.333
• /
• pp.35-42
• /
• 2005

This paper proposes a new reseeding methodology using a variable-rank multiple-polynomial linear feedback shift register (MP-LFSR). In the proposed reseeding scheme, a test cube with large number of specified bits is encoded with a high-rank polynomial, while a test cube with a small number of specified bits is encoded with a low-rank polynomial. Therefore, according to the number of specified bits in each test cube, the size of the encoded data can be optimally reduced. A variable-rank MP-LFSR can be implemented with a slight modification of a conventional MP-LFSR and Multiple Polynomial can be represented by adding just 1 bit to encoding data. The experimental results on the largest ISCAS'89 benchmark circuits show that the proposed methodology can provide much better encoding efficiency than the previous methods with adequate hardware overhead.